diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 63d2e8346..ebf79ddd9 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+1999-11-01  Gavin Romig-Koch  <gavin@cygnus.com>
+
+	* mips.h (OPCODE_IS_MEMBER): New.
+
 1999-10-29  Nick Clifton  <nickc@cygnus.com>
 
 	* d30v.h (SHORT_AR): Define.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index f0a8c7ef9..07e0fd7c6 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -319,6 +319,24 @@ struct mips_opcode
 /* Toshiba R3900 instruction.  */
 #define INSN_3900                   0x00000080
 
+/* Test for membership in an ISA including chip specific ISAs.
+   INSN is pointer to an element of the opcode table; ISA is the
+   specified ISA to test against; and CPU is the CPU specific ISA
+   to test, or zero if no CPU specific ISA test is desired. */ 
+
+#define OPCODE_IS_MEMBER(insn,isa,cpu) 				\
+    ((((insn)->membership & INSN_ISA) != 0			\
+      && ((insn)->membership & INSN_ISA) <= isa)		\
+     || (cpu == 4650						\
+	 && ((insn)->membership & INSN_4650) != 0)		\
+     || (cpu == 4010						\
+	 && ((insn)->membership & INSN_4010) != 0)		\
+     || ((cpu == 4100						\
+	  || cpu == 4111					\
+	  )							\
+	 && ((insn)->membership & INSN_4100) != 0)		\
+     || (cpu == 3900						\
+	 && ((insn)->membership & INSN_3900) != 0))
 
 /* This is a list of macro expanded instructions.
  *