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[ gas/ChangeLog ] 

2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
	(mips_opts): Initialize "ase_mdmx" member.
	(file_ase_mdmx): New variable.
	(CPU_HAS_MDMX): New macro.
	(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
	based on command line options and configuration defaults.
	(macro_build): Note in comment that use of MDMX in macros is
	not currently allowed.
	(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
	"Z" MDMX operand types.
	(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
	and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
	types.
	(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
	Add support for "-mdmx" and "-no-mdmx" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mdmx" and ".set nomdmx".
	(mips_elf_final_processing): Set MDMX ASE ELF header flag if
	file_ase_mdmx was set.
	* doc/as.texinfo: Document -mdmx and -no-mdmx options.
	* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
	nomdmx" directives.

[ gas/testsuite/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mdmx.s: New file.
	* gas/mips/mips64-mdmx.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mdmx" test.

[ include/opcode/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
	(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
	(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
	(INSN_MDMX): New constants, for MDMX support.
	(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.

[ opcodes/ChangeLog ]
2002-05-30  Chris G. Demetriou  <cgd@broadcom.com>
            Ed Satterthwaite  <ehs@broadcom.com>

	* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
	and 'Z' formats, for MDMX.
        (mips_isa_type): Add MDMX instructions to the ISA
	bit mask for bfd_mach_mipsisa64.
	* mips-opc.c: Add support for MDMX instructions.
	(MX): New definition.

	* mips-dis.c: Update copyright years to include 2002.
This commit is contained in:
Chris Demetriou 2002-05-31 01:17:17 +00:00
parent 5d8c7a56c2
commit 81a0a3b440
2 changed files with 33 additions and 1 deletions
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8
include/opcode/ChangeLog
View File

@ -1,3 +1,11 @@
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net> 2002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
* dlx.h: New file. * dlx.h: New file.

26
include/opcode/mips.h
View File

@ -133,6 +133,16 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
#define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */
#define OP_SH_CODE19 6 /* 19 bit wait code. */ #define OP_SH_CODE19 6 /* 19 bit wait code. */
#define OP_MASK_CODE19 0x7ffff #define OP_MASK_CODE19 0x7ffff
#define OP_SH_ALN 21
#define OP_MASK_ALN 0x7
#define OP_SH_VSEL 21
#define OP_MASK_VSEL 0x1f
/* Values in the 'VSEL' field. */
#define MDMX_FMTSEL_IMM_QH 0x1d
#define MDMX_FMTSEL_IMM_OB 0x1e
#define MDMX_FMTSEL_VEC_QH 0x15
#define MDMX_FMTSEL_VEC_OB 0x16
/* This structure holds information for a particular instruction. */ /* This structure holds information for a particular instruction. */
@ -220,13 +230,21 @@ struct mips_opcode
"f" 32 bit floating point constant "f" 32 bit floating point constant
"l" 32 bit floating point constant in .lit4 "l" 32 bit floating point constant in .lit4
MDMX instruction operands (note that while these use the FP register
fields, they accept both $fN and $vN names for the registers):
"O" MDMX alignment offset (OP_*_ALN)
"Q" MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT)
"X" MDMX destination register (OP_*_FD)
"Y" MDMX source register (OP_*_FS)
"Z" MDMX source register (OP_*_FT)
Other: Other:
"()" parens surrounding optional value "()" parens surrounding optional value
"," separates operands "," separates operands
Characters used so far, for quick reference when adding more: Characters used so far, for quick reference when adding more:
"<>()," "<>(),"
"ABCDEFGHIJLMNPRSTUVW" "ABCDEFGHIJLMNOPQRSTUVWXYZ"
"abcdfhijklopqrstuvwxz" "abcdfhijklopqrstuvwxz"
*/ */
@ -297,6 +315,10 @@ struct mips_opcode
#define INSN_MULT 0x40000000 #define INSN_MULT 0x40000000
/* Instruction synchronize shared memory. */ /* Instruction synchronize shared memory. */
#define INSN_SYNC 0x80000000 #define INSN_SYNC 0x80000000
/* Instruction reads MDMX accumulator. XXX FIXME: No bits left! */
#define INSN_READ_MDMX_ACC 0
/* Instruction writes MDMX accumulator. XXX FIXME: No bits left! */
#define INSN_WRITE_MDMX_ACC 0
/* Instruction is actually a macro. It should be ignored by the /* Instruction is actually a macro. It should be ignored by the
disassembler, and requires special treatment by the assembler. */ disassembler, and requires special treatment by the assembler. */
@ -320,6 +342,8 @@ struct mips_opcode
/* MIPS-3D ASE */ /* MIPS-3D ASE */
#define INSN_MIPS3D 0x00004000 #define INSN_MIPS3D 0x00004000
/* MDMX ASE */
#define INSN_MDMX 0x00008000
/* Chip specific instructions. These are bitmasks. */ /* Chip specific instructions. These are bitmasks. */