Added new instructions for next version of VIA PadLock core.
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@ -1,3 +1,7 @@
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2004-08-30 Michal Ludvig <mludvig@suse.cz>
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* i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
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2004-07-22 H.J. Lu <hongjiu.lu@intel.com>
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2004-07-22 H.J. Lu <hongjiu.lu@intel.com>
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* i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
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* i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
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@ -1378,6 +1378,9 @@ static const template i386_optab[] =
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{"xcryptcbc", 0, 0xf30fa7d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xcryptcbc", 0, 0xf30fa7d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xcryptcfb", 0, 0xf30fa7e0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xcryptcfb", 0, 0xf30fa7e0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xcryptofb", 0, 0xf30fa7e8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xcryptofb", 0, 0xf30fa7e8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"montmul", 0, 0xf30fa6c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xsha1", 0, 0xf30fa6c8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xsha256", 0, 0xf30fa6d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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/* Alias for xstorerng. */
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/* Alias for xstorerng. */
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{"xstore", 0, 0x000fa7c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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{"xstore", 0, 0x000fa7c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
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