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acadia-newlib/newlib/libc/machine/mips
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Giovanni Bajo 9bba9c2bdd Fix a bug in setjmp for MIPS o32/o64 FPXX/FP64 
It seems there is a swapped logic in one of the subcases of
setjmp.S for MIPS: when the FPU registers are 64-bit within
a 32-bit aligned jmp_buf, the code realigns the pointers
before doing 64-bit writes, but the branch logic is swapped:
we must avoid the address adjustement when bit 2 is zero
(that is, the address is already 8-byte aligned).

This always triggers an address error when run, as tested
on a MIPS VR4300 with O64 ABI.
 		2022-12-19 10:38:05 +01:00
..
machine Removed Soft float from MIPS 2021-02-05 10:32:16 +01:00
sys mips fenv support 2020-07-03 10:41:45 +02:00
Makefile.inc newlib: libc: merge build up a directory 2022-03-16 21:18:25 -04:00
memcpy.S change _COMPILING_NEWLIB to _LIBC 2021-11-15 19:32:23 -05:00
memset.S change _COMPILING_NEWLIB to _LIBC 2021-11-15 19:32:23 -05:00
setjmp.S Fix a bug in setjmp for MIPS o32/o64 FPXX/FP64 2022-12-19 10:38:05 +01:00
strcmp.S change _COMPILING_NEWLIB to _LIBC 2021-11-15 19:32:23 -05:00
strlen.c
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strncpy.c
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