116 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
			
		
		
	
	
			116 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
/*
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 * longjmp for the Blackfin processor
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 *
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 * Copyright (C) 2006 Analog Devices, Inc.
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 *
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 * The authors hereby grant permission to use, copy, modify, distribute,
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 * and license this software and its documentation for any purpose, provided
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 * that existing copyright notices are retained in all copies and that this
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 * notice is included verbatim in any distributions. No written agreement,
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 * license, or royalty fee is required for any of the authorized uses.
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 * Modifications to this software may be copyrighted by their authors
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 * and need not follow the licensing terms described here, provided that
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 * the new terms are clearly indicated on the first page of each file where
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 * they apply.
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 */
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#define _ASM
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#define _SETJMP_H
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.text;
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.align 4;
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.globl _longjmp;
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.type _longjmp, STT_FUNC;
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_longjmp:
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	P0 = R0;
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	R0 = [P0 + 0x00];
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	[--SP] = R0;		/* Put P0 on the stack */
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	P1 = [P0 + 0x04];
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	P2 = [P0 + 0x08];
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	P3 = [P0 + 0x0C];
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	P4 = [P0 + 0x10];
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	P5 = [P0 + 0x14];
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	FP = [P0 + 0x18];
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	R0 = [SP++];		/* Grab P0 from old stack */
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	SP = [P0 + 0x1C];	/* Update Stack Pointer */
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	[--SP] = R0;		/* Put P0 on new stack */
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	[--SP] = R1;		/* Put VAL arg on new stack */
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	R0 = [P0 + 0x20];	/* Data Registers */
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	R1 = [P0 + 0x24];
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	R2 = [P0 + 0x28];
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	R3 = [P0 + 0x2C];
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	R4 = [P0 + 0x30];
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	R5 = [P0 + 0x34];
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	R6 = [P0 + 0x38];
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	R7 = [P0 + 0x3C];
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	R0 = [P0 + 0x40];
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	ASTAT = R0;
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	R0 = [P0 + 0x44];	/* Loop Counters */
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	LC0 = R0;
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	R0 = [P0 + 0x48];
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	LC1 = R0;
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	R0 = [P0 + 0x4C];	/* Accumulators */
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	A0.W = R0;
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	R0 = [P0 + 0x50];
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	A0.X = R0;
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	R0 = [P0 + 0x54];
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	A1.W = R0;
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	R0 = [P0 + 0x58];
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	A1.X = R0;
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	R0 = [P0 + 0x5C];	/* Index Registers */
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	I0 = R0;
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	R0 = [P0 + 0x60];
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	I1 = R0;
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	R0 = [P0 + 0x64];
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	I2 = R0;
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	R0 = [P0 + 0x68];
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	I3 = R0;
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	R0 = [P0 + 0x6C];	/* Modifier Registers */
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	M0 = R0;
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	R0 = [P0 + 0x70];
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	M1 = R0;
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	R0 = [P0 + 0x74];
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	M2 = R0;
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	R0 = [P0 + 0x78];
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	M3 = R0;
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	R0 = [P0 + 0x7C];	/* Length Registers */
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	L0 = R0;
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	R0 = [P0 + 0x80];
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	L1 = R0;
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	R0 = [P0 + 0x84];
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	L2 = R0;
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	R0 = [P0 + 0x88];
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	L3 = R0;
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	R0 = [P0 + 0x8C];	/* Base Registers */
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	B0 = R0;
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	R0 = [P0 + 0x90];
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	B1 = R0;
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	R0 = [P0 + 0x94];
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	B2 = R0;
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	R0 = [P0 + 0x98];
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	B3 = R0;
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	R0 = [P0 + 0x9C];	/* Return Address (PC) */
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	RETS = R0;
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	R0 = [SP++];
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	P0 = [SP++];
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	CC = R0 == 0;
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	IF !CC JUMP 1f;
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	R0 = 1;
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1:
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	RTS;
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.size _longjmp, .-_longjmp;
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