181 lines
5.9 KiB
ArmAsm
181 lines
5.9 KiB
ArmAsm
/* Copyright (c) 2010-2011,2013 Linaro Limited
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Linaro Limited nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Assumes:
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ARMv6T2 or ARMv7E-M, AArch32
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*/
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/* Copyright (c) 2015 ARM Ltd.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
|
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documentation and/or other materials provided with the distribution.
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* Neither the name of the Linaro nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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#include "acle-compat.h"
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.macro def_fn f p2align=0
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.text
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.p2align \p2align
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.global \f
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.type \f, %function
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\f:
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.endm
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#ifdef __ARMEB__
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#define S2LO lsl
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#define S2HI lsr
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#else
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#define S2LO lsr
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#define S2HI lsl
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#endif
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/* This code requires Thumb. */
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#if __ARM_ARCH_PROFILE == 'M'
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.arch armv7e-m
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#else
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.arch armv6t2
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#endif
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.eabi_attribute Tag_ARM_ISA_use, 0
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.thumb
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.syntax unified
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/* Parameters and result. */
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#define srcin r0
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#define result r0
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/* Internal variables. */
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#define src r1
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#define data1a r2
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#define data1b r3
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#define const_m1 r12
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#define const_0 r4
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#define tmp1 r4 /* Overlaps const_0 */
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#define tmp2 r5
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def_fn strlen p2align=6
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pld [srcin, #0]
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strd r4, r5, [sp, #-8]!
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bic src, srcin, #7
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mvn const_m1, #0
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ands tmp1, srcin, #7 /* (8 - bytes) to alignment. */
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pld [src, #32]
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bne.w .Lmisaligned8
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mov const_0, #0
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mov result, #-8
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.Lloop_aligned:
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/* Bytes 0-7. */
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ldrd data1a, data1b, [src]
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pld [src, #64]
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add result, result, #8
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.Lstart_realigned:
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uadd8 data1a, data1a, const_m1 /* Saturating GE<0:3> set. */
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sel data1a, const_0, const_m1 /* Select based on GE<0:3>. */
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uadd8 data1b, data1b, const_m1
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sel data1b, data1a, const_m1 /* Only used if d1a == 0. */
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cbnz data1b, .Lnull_found
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/* Bytes 8-15. */
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ldrd data1a, data1b, [src, #8]
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uadd8 data1a, data1a, const_m1 /* Saturating GE<0:3> set. */
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add result, result, #8
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sel data1a, const_0, const_m1 /* Select based on GE<0:3>. */
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uadd8 data1b, data1b, const_m1
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sel data1b, data1a, const_m1 /* Only used if d1a == 0. */
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cbnz data1b, .Lnull_found
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/* Bytes 16-23. */
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ldrd data1a, data1b, [src, #16]
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uadd8 data1a, data1a, const_m1 /* Saturating GE<0:3> set. */
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add result, result, #8
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sel data1a, const_0, const_m1 /* Select based on GE<0:3>. */
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uadd8 data1b, data1b, const_m1
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sel data1b, data1a, const_m1 /* Only used if d1a == 0. */
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cbnz data1b, .Lnull_found
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/* Bytes 24-31. */
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ldrd data1a, data1b, [src, #24]
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add src, src, #32
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uadd8 data1a, data1a, const_m1 /* Saturating GE<0:3> set. */
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add result, result, #8
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sel data1a, const_0, const_m1 /* Select based on GE<0:3>. */
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uadd8 data1b, data1b, const_m1
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sel data1b, data1a, const_m1 /* Only used if d1a == 0. */
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cmp data1b, #0
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beq .Lloop_aligned
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.Lnull_found:
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cmp data1a, #0
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itt eq
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addeq result, result, #4
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moveq data1a, data1b
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#ifndef __ARMEB__
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rev data1a, data1a
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#endif
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clz data1a, data1a
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ldrd r4, r5, [sp], #8
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add result, result, data1a, lsr #3 /* Bits -> Bytes. */
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bx lr
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.Lmisaligned8:
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ldrd data1a, data1b, [src]
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and tmp2, tmp1, #3
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rsb result, tmp1, #0
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lsl tmp2, tmp2, #3 /* Bytes -> bits. */
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tst tmp1, #4
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pld [src, #64]
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S2HI tmp2, const_m1, tmp2
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orn data1a, data1a, tmp2
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itt ne
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ornne data1b, data1b, tmp2
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movne data1a, const_m1
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mov const_0, #0
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b .Lstart_realigned
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.size strlen, . - strlen
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