From 4c936623b584545b9e57ee21b7cfd308f9b79949 Mon Sep 17 00:00:00 2001
From: Drew Galbraith <dgalbraith33@gmail.com>
Date: Fri, 16 Jun 2023 23:15:41 -0700
Subject: [PATCH] Specify our target in .ccls

---
 .ccls                           | 2 ++
 sys/yellowstone/yellowstone.cpp | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)
 create mode 100644 .ccls

diff --git a/.ccls b/.ccls
new file mode 100644
index 0000000..8ec12c4
--- /dev/null
+++ b/.ccls
@@ -0,0 +1,2 @@
+%compile_commands.json
+--target=x86_64-pc-acadia-elf
diff --git a/sys/yellowstone/yellowstone.cpp b/sys/yellowstone/yellowstone.cpp
index 8cc084d..7914917 100644
--- a/sys/yellowstone/yellowstone.cpp
+++ b/sys/yellowstone/yellowstone.cpp
@@ -6,7 +6,7 @@
 
 #include "hw/pcie.h"
 
-int main(uint64_t port_cap) {
+uint64_t main(uint64_t port_cap) {
   dbgln("Yellowstone Initializing.");
   uint64_t msg_type, type, cap, bytes, caps;
   check(ZPortRecv(port_cap, 8, reinterpret_cast<uint8_t*>(&msg_type), 1, &cap,