[Voyageurs] XHCI Event Segment working with polling.
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parent
b41784b938
commit
4cb0b0b2ae
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@ -15,7 +15,7 @@ uint64_t main(uint64_t init_port) {
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YellowstoneClient yellowstone(gInitEndpointCap);
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YellowstoneClient yellowstone(gInitEndpointCap);
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ASSIGN_OR_RETURN(XhciDriver xhci, XhciDriver::InitiateDriver(yellowstone));
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ASSIGN_OR_RETURN(auto xhci, XhciDriver::InitiateDriver(yellowstone));
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dbgln("Initializing PS/2 Driver.");
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dbgln("Initializing PS/2 Driver.");
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KeyboardDriver driver;
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KeyboardDriver driver;
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@ -1,10 +1,47 @@
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#include "xhci/trb.h"
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#include "xhci/trb.h"
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constexpr uint8_t kTrb_Normal = 1;
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constexpr uint8_t kTrb_SetupStage = 2;
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constexpr uint8_t kTrb_DataStage = 3;
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constexpr uint8_t kTrb_StatusStage = 4;
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constexpr uint8_t kTrb_Isoch = 5;
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constexpr uint8_t kTrb_Link = 6;
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constexpr uint8_t kTrb_EventData = 7;
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constexpr uint8_t kTrb_NoOp = 8;
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constexpr uint8_t kTrb_EnableSlot = 9;
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constexpr uint8_t kTrb_DisableSlot = 10;
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constexpr uint8_t kTrb_NoOpCommand = 23;
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constexpr uint8_t kTrb_TypeOffset = 10;
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constexpr uint8_t kTrb_Cycle = 1;
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XhciTrb CreateLinkTrb(uint64_t physical_address) {
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XhciTrb CreateLinkTrb(uint64_t physical_address) {
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return {
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return {
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.parameter = physical_address,
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.parameter = physical_address,
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.status = 0,
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.status = 0,
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.type_and_cycle = 6 << 10,
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.type_and_cycle = kTrb_Link << kTrb_TypeOffset,
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.control = 0,
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};
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}
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XhciTrb CreateEnableSlotTrb() {
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return {
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.parameter = 0,
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.status = 0,
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// FIXME: Accept Cycle Bit as a parameter.
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.type_and_cycle = kTrb_EnableSlot << kTrb_TypeOffset | kTrb_Cycle,
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// FIXME: Specify slot type if necessary. (XHCI Table 7-9)?
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.control = 0,
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};
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}
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XhciTrb CreateNoOpCommandTrb() {
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return {
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.parameter = 0,
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.status = 0,
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// FIXME: Accept Cycle Bit as a parameter.
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.type_and_cycle = kTrb_NoOpCommand << kTrb_TypeOffset | kTrb_Cycle,
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.control = 0,
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.control = 0,
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};
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};
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}
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}
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@ -3,3 +3,6 @@
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#include "xhci/xhci.h"
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#include "xhci/xhci.h"
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XhciTrb CreateLinkTrb(uint64_t physical_address);
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XhciTrb CreateLinkTrb(uint64_t physical_address);
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XhciTrb CreateEnableSlotTrb();
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XhciTrb CreateNoOpCommandTrb();
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@ -7,6 +7,12 @@
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TrbRing::TrbRing() {
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TrbRing::TrbRing() {
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uint64_t number_trbs = 0x1000 / sizeof(XhciTrb);
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uint64_t number_trbs = 0x1000 / sizeof(XhciTrb);
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page_ = mmth::OwnedMemoryRegion::ContiguousPhysical(0x1000, &phys_address_);
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page_ = mmth::OwnedMemoryRegion::ContiguousPhysical(0x1000, &phys_address_);
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// Zero out data.
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uint64_t* page_ptr = reinterpret_cast<uint64_t*>(page_.vaddr());
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for (uint64_t i = 0; i < 0x1000 / sizeof(uint64_t); i++) {
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page_ptr[i] = 0;
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}
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trb_list_ = glcr::ArrayView<XhciTrb>(
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trb_list_ = glcr::ArrayView<XhciTrb>(
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reinterpret_cast<XhciTrb*>(page_.vaddr()), number_trbs);
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reinterpret_cast<XhciTrb*>(page_.vaddr()), number_trbs);
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@ -22,3 +28,9 @@ void TrbRingWriter::EnqueueTrb(const XhciTrb& trb) {
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trb_list_[ptr] = trb;
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trb_list_[ptr] = trb;
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}
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}
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bool TrbRingReader::HasNext() {
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return (trb_list_[dequeue_ptr_].type_and_cycle & 0x1) == cycle_bit_;
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}
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XhciTrb TrbRingReader::Read() { return trb_list_[dequeue_ptr_++]; }
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@ -24,3 +24,15 @@ class TrbRingWriter : public TrbRing {
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private:
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private:
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uint64_t enqueue_ptr_ = 0;
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uint64_t enqueue_ptr_ = 0;
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};
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};
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class TrbRingReader : public TrbRing {
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public:
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bool HasNext();
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XhciTrb Read();
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uint64_t DequeuePtr() { return phys_address_ + dequeue_ptr_; }
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private:
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uint64_t dequeue_ptr_ = 0;
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uint8_t cycle_bit_ = 1;
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};
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@ -73,7 +73,10 @@ struct XhciRuntime {
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uint64_t reserved3;
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uint64_t reserved3;
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uint64_t reserved4;
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uint64_t reserved4;
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XhciInterrupter interrupters[1024];
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XhciInterrupter interrupters[1024];
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} __attribute__((packed));
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struct XhciDoorbells {
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uint32_t doorbell[256];
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} __attribute__((packed));
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} __attribute__((packed));
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struct XhciPort {
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struct XhciPort {
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@ -1,29 +1,67 @@
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#include "xhci/xhci_driver.h"
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#include "xhci/xhci_driver.h"
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#include <mammoth/proc/thread.h>
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#include <mammoth/util/debug.h>
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#include <mammoth/util/debug.h>
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#include <mammoth/util/memory_region.h>
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#include <mammoth/util/memory_region.h>
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#include <zcall.h>
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#include <zcall.h>
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#include "xhci/trb.h"
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#include "xhci/xhci.h"
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#include "xhci/xhci.h"
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glcr::ErrorOr<XhciDriver> XhciDriver::InitiateDriver(
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void interrupt_thread(void* void_driver) {
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XhciDriver* driver = static_cast<XhciDriver*>(void_driver);
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driver->InterruptLoop();
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crash("Driver returned from interrupt loop", glcr::INTERNAL);
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}
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glcr::ErrorOr<glcr::UniquePtr<XhciDriver>> XhciDriver::InitiateDriver(
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yellowstone::YellowstoneClient& yellowstone) {
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yellowstone::YellowstoneClient& yellowstone) {
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yellowstone::XhciInfo info;
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yellowstone::XhciInfo info;
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check(yellowstone.GetXhciInfo(info));
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check(yellowstone.GetXhciInfo(info));
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mmth::OwnedMemoryRegion pci_region =
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mmth::OwnedMemoryRegion pci_region =
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mmth::OwnedMemoryRegion::FromCapability(info.mutable_xhci_region());
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mmth::OwnedMemoryRegion::FromCapability(info.mutable_xhci_region());
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XhciDriver driver(glcr::Move(pci_region));
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// Have to make this a heap object so that the reference passed to the
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driver.ParseMmioStructures();
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// interrupt loop remains valid.
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driver.DumpDebugInfo();
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glcr::UniquePtr<XhciDriver> driver(new XhciDriver(glcr::Move(pci_region)));
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driver.FreeExistingMemoryStructures();
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driver->ParseMmioStructures();
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driver.ResetController();
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driver->FreeExistingMemoryStructures();
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driver->ResetController();
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driver->StartInterruptThread();
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dbgln("XHCI CONTROLLER RESET");
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dbgln("XHCI CONTROLLER RESET");
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driver.DumpDebugInfo();
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driver->NoOpCommand();
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check(ZThreadSleep(100));
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driver->InitiateDevices();
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driver.DumpDebugInfo();
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return glcr::Move(driver);
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return driver;
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}
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void XhciDriver::InterruptLoop() {
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while (true) {
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while ((runtime_->interrupters[0].management & 0x1) != 0x1) {
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check(ZThreadSleep(50));
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}
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while (event_ring_.HasNext()) {
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XhciTrb trb = event_ring_.Read();
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uint16_t type = trb.type_and_cycle >> 10;
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switch (type) {
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case 33:
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dbgln("Command Completion Event. {x}", trb.parameter);
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break;
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case 34:
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dbgln("Port Status Change Event, enabling slot.");
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command_ring_.EnqueueTrb(CreateEnableSlotTrb());
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doorbells_->doorbell[0] = 0;
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break;
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default:
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dbgln("Unknown TRB Type {x} received.", type);
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break;
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}
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}
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runtime_->interrupters[0].event_ring_dequeue_pointer =
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event_ring_.DequeuePtr() | 0x8;
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runtime_->interrupters[0].management |= 0x1;
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}
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}
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}
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void XhciDriver::DumpDebugInfo() {
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void XhciDriver::DumpDebugInfo() {
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@ -62,6 +100,7 @@ void XhciDriver::DumpDebugInfo() {
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if ((port->status_and_control & 0x3) == 0x1) {
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if ((port->status_and_control & 0x3) == 0x1) {
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dbgln("Resetting: {x}", i);
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dbgln("Resetting: {x}", i);
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port->status_and_control |= 0x10;
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port->status_and_control |= 0x10;
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doorbells_->doorbell[0] = 0;
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}
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}
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}
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}
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@ -88,10 +127,22 @@ glcr::ErrorCode XhciDriver::ParseMmioStructures() {
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runtime_ = reinterpret_cast<XhciRuntime*>(mmio_regions_.vaddr() +
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runtime_ = reinterpret_cast<XhciRuntime*>(mmio_regions_.vaddr() +
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capabilities_->runtime_offset);
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capabilities_->runtime_offset);
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doorbells_ = reinterpret_cast<XhciDoorbells*>(mmio_regions_.vaddr() +
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capabilities_->doorbell_offset);
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return glcr::OK;
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return glcr::OK;
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}
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}
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glcr::ErrorCode XhciDriver::ResetController() {
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glcr::ErrorCode XhciDriver::ResetController() {
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// Stop the Host Controller.
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// FIXME: Do this before freeing existing structures.
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operational_->usb_command &= ~0x1;
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while ((operational_->usb_status & 0x1) != 0x1) {
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dbgln("Waiting XHCI Halt.");
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RET_ERR(ZThreadSleep(50));
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}
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// Host Controller Reset
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// Host Controller Reset
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operational_->usb_command |= 0x2;
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operational_->usb_command |= 0x2;
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@ -115,8 +166,13 @@ glcr::ErrorCode XhciDriver::ResetController() {
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return glcr::OK;
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return glcr::OK;
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}
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}
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void XhciDriver::StartInterruptThread() {
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interrupt_thread_ = Thread(interrupt_thread, this);
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}
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glcr::ErrorCode XhciDriver::InitiateCommandRing() {
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glcr::ErrorCode XhciDriver::InitiateCommandRing() {
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operational_->command_ring_control = command_ring_.PhysicalAddress();
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operational_->command_ring_control = command_ring_.PhysicalAddress();
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dbgln("CRC: {x}", operational_->command_ring_control);
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return glcr::OK;
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return glcr::OK;
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}
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}
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@ -155,11 +211,35 @@ glcr::ErrorCode XhciDriver::InitiateEventRingSegmentTable() {
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event_ring_.PhysicalAddress();
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event_ring_.PhysicalAddress();
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event_ring_segment_table_[0].ring_segment_size = ers_size & 0xFFFF;
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event_ring_segment_table_[0].ring_segment_size = ers_size & 0xFFFF;
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runtime_->interrupters[0].event_ring_segment_table_base_address = erst_phys;
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runtime_->interrupters[0].event_ring_dequeue_pointer =
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runtime_->interrupters[0].event_ring_dequeue_pointer = erst_phys;
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event_ring_.PhysicalAddress() | 0x8;
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runtime_->interrupters[0].event_ring_segment_table_size = 1;
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runtime_->interrupters[0].event_ring_segment_table_size = 1;
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runtime_->interrupters[0].event_ring_segment_table_base_address = erst_phys;
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// Enable interrupts.
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// Enable interrupts.
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runtime_->interrupters[0].management |= 0x2;
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runtime_->interrupters[0].management |= 0x2;
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runtime_->interrupters[0].moderation = 4000;
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operational_->usb_command |= 0x4;
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operational_->usb_command |= 0x4;
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return glcr::OK;
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return glcr::OK;
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}
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}
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glcr::ErrorCode XhciDriver::InitiateDevices() {
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uint64_t max_ports = (capabilities_->hcs_params_1 & 0xFF00'0000) >> 24;
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for (uint64_t i = 0; i < max_ports; i++) {
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XhciPort* port = reinterpret_cast<XhciPort*>(
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reinterpret_cast<uint64_t>(operational_) + 0x400 + (0x10 * i));
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port->status_and_control &= ~0x10000;
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dbgln("Port {x}: {x}", i, port->status_and_control);
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if ((port->status_and_control & 0x3) == 0x1) {
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dbgln("Resetting: {x}", i);
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port->status_and_control |= 0x10;
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}
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}
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return glcr::OK;
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}
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glcr::ErrorCode XhciDriver::NoOpCommand() {
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command_ring_.EnqueueTrb(CreateNoOpCommandTrb());
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doorbells_->doorbell[0] = 0;
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return glcr::OK;
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}
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#pragma once
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#pragma once
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#include <glacier/memory/unique_ptr.h>
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#include <glacier/status/error_or.h>
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#include <glacier/status/error_or.h>
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#include <mammoth/proc/thread.h>
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#include <mammoth/util/memory_region.h>
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#include <mammoth/util/memory_region.h>
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#include <yellowstone/yellowstone.yunq.client.h>
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#include <yellowstone/yellowstone.yunq.client.h>
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class XhciDriver {
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class XhciDriver {
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public:
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public:
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static glcr::ErrorOr<XhciDriver> InitiateDriver(
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static glcr::ErrorOr<glcr::UniquePtr<XhciDriver>> InitiateDriver(
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yellowstone::YellowstoneClient& yellowstone);
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yellowstone::YellowstoneClient& yellowstone);
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XhciDriver(const XhciDriver&) = delete;
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XhciDriver(XhciDriver&&) = default;
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void DumpDebugInfo();
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void DumpDebugInfo();
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void InterruptLoop();
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private:
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private:
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// MMIO Structures.
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// MMIO Structures.
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mmth::OwnedMemoryRegion pci_region_;
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mmth::OwnedMemoryRegion pci_region_;
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PciDeviceHeader* pci_device_header_;
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PciDeviceHeader* pci_device_header_;
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mmth::OwnedMemoryRegion mmio_regions_;
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mmth::OwnedMemoryRegion mmio_regions_;
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XhciCapabilities* capabilities_;
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volatile XhciCapabilities* capabilities_;
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XhciOperational* operational_;
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volatile XhciOperational* operational_;
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// TODO: Extended Capabilities.
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// TODO: Extended Capabilities.
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XhciRuntime* runtime_;
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volatile XhciRuntime* runtime_;
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// TODO: Doorbell Array.
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volatile XhciDoorbells* doorbells_;
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// Host Memory Regions.
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// Host Memory Regions.
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TrbRingWriter command_ring_;
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TrbRingWriter command_ring_;
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@ -35,7 +42,8 @@ class XhciDriver {
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mmth::OwnedMemoryRegion event_ring_segment_table_mem_;
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mmth::OwnedMemoryRegion event_ring_segment_table_mem_;
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XhciEventRingSegmentTableEntry* event_ring_segment_table_;
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XhciEventRingSegmentTableEntry* event_ring_segment_table_;
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TrbRing event_ring_;
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TrbRingReader event_ring_;
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Thread interrupt_thread_;
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XhciDriver(mmth::OwnedMemoryRegion&& pci_space);
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XhciDriver(mmth::OwnedMemoryRegion&& pci_space);
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@ -43,8 +51,13 @@ class XhciDriver {
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glcr::ErrorCode FreeExistingMemoryStructures() { return glcr::OK; }
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glcr::ErrorCode FreeExistingMemoryStructures() { return glcr::OK; }
|
||||||
|
|
||||||
glcr::ErrorCode ResetController();
|
glcr::ErrorCode ResetController();
|
||||||
|
void StartInterruptThread();
|
||||||
|
|
||||||
glcr::ErrorCode InitiateCommandRing();
|
glcr::ErrorCode InitiateCommandRing();
|
||||||
glcr::ErrorCode InitiateDeviceContextBaseArray();
|
glcr::ErrorCode InitiateDeviceContextBaseArray();
|
||||||
glcr::ErrorCode InitiateEventRingSegmentTable();
|
glcr::ErrorCode InitiateEventRingSegmentTable();
|
||||||
|
|
||||||
|
glcr::ErrorCode InitiateDevices();
|
||||||
|
|
||||||
|
glcr::ErrorCode NoOpCommand();
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in New Issue