diff --git a/rust/sys/denali/src/ahci/controller.rs b/rust/sys/denali/src/ahci/controller.rs
index a9c998d..6abf744 100644
--- a/rust/sys/denali/src/ahci/controller.rs
+++ b/rust/sys/denali/src/ahci/controller.rs
@@ -1,3 +1,6 @@
+use core::ops::DerefMut;
+
+use alloc::boxed::Box;
 use alloc::sync::Arc;
 use mammoth::sync::Mutex;
 use mammoth::thread;
@@ -203,11 +206,11 @@ struct Command {
     #[allow(dead_code)] // We need to own this even if we never access it.
     memory_region: MemoryRegion,
 
-    callback: fn(&Self) -> (),
+    callback_internal: Box<dyn Fn(&Self) + Sync + Send + 'static>,
 }
 
 impl Command {
-    pub fn identify(callback: fn(&Self) -> ()) -> Result<Self, ZError> {
+    pub fn identify(callback: Box<dyn Fn(&Self) + Sync + Send + 'static>) -> Result<Self, ZError> {
         let (memory_region, paddr) = MemoryRegion::contiguous_physical(512)?;
 
         Ok(Self {
@@ -216,12 +219,12 @@ impl Command {
             sector_cnt: 1,
             paddr,
             memory_region,
-            callback,
+            callback_internal: callback,
         })
     }
 
     pub fn callback(&self) {
-        (self.callback)(self);
+        (self.callback_internal)(self);
     }
 }
 
@@ -235,6 +238,10 @@ struct PortController<'a> {
     ahci_port_hba: &'a mut AhciPortHba,
     command_slots: [Option<Arc<Command>>; 32],
     command_structures: MemoryRegion,
+
+    // FIXME: These should probably be something like a OnceCell (or OnceLock).
+    sector_size: Arc<Mutex<Option<u64>>>,
+    sector_cnt: Arc<Mutex<Option<u64>>>,
 }
 
 impl<'a> PortController<'a> {
@@ -263,6 +270,8 @@ impl<'a> PortController<'a> {
             ahci_port_hba,
             command_slots: [const { None }; 32],
             command_structures,
+            sector_size: Arc::new(Mutex::new(None)),
+            sector_cnt: Arc::new(Mutex::new(None)),
         };
 
         // This leaves space for 8 prdt entries.
@@ -276,10 +285,12 @@ impl<'a> PortController<'a> {
 
     pub fn identify(&mut self) -> Result<(), ZError> {
         if self.ahci_port_hba.signature == 0x101 {
-            let callback = |c: &Command| {
+            let sector_size = self.sector_size.clone();
+            let sector_cnt = self.sector_cnt.clone();
+            let callback = move |c: &Command| {
                 mammoth::debug!("TESTING");
                 let ident = c.memory_region.slice::<u16>();
-                let sector_size = if ident[106] & (1 << 12) != 0 {
+                let new_sector_size = if ident[106] & (1 << 12) != 0 {
                     ident[117] as u32 | ((ident[118] as u32) << 16)
                 } else {
                     512
@@ -291,12 +302,18 @@ impl<'a> PortController<'a> {
                         | (ident[102] as u64) << 32
                         | (ident[103] as u64) << 48
                 } else {
-                    (ident[60] as u64 | (ident[61] as u64) << 16) as u64
+                    ident[60] as u64 | (ident[61] as u64) << 16
                 };
-                mammoth::debug!("Sector size: {:#0x}", sector_size);
+                mammoth::debug!("Sector size: {:#0x}", new_sector_size);
                 mammoth::debug!("LBA Count: {:#0x}", lba_count);
+
+                let _ = sector_size
+                    .lock()
+                    .deref_mut()
+                    .insert(new_sector_size as u64);
+                let _ = sector_cnt.lock().deref_mut().insert(lba_count as u64);
             };
-            self.issue_command(Arc::from(Command::identify(callback)?))?;
+            self.issue_command(Arc::from(Command::identify(Box::new(callback))?))?;
         } else {
             let sig = self.ahci_port_hba.signature;
             mammoth::debug!("Skipping non-sata sig: {:#0x}", sig);