[denali] Relocate AHCI structures to memory we control
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1412c5b73e
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@ -96,7 +96,7 @@ struct CommandTable {
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uint8_t command_fis[64];
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uint8_t command_fis[64];
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uint8_t atapi_command[16];
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uint8_t atapi_command[16];
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uint8_t reserved[48];
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uint8_t reserved[48];
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PhysicalRegionDescriptor prdt[65535];
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PhysicalRegionDescriptor prdt[8];
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} __attribute__((packed));
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} __attribute__((packed));
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typedef enum {
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typedef enum {
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@ -9,35 +9,38 @@ AhciDevice::AhciDevice(AhciPort* port) : port_struct_(port) {
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if ((port_struct_->sata_status & 0x103) != 0x103) {
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if ((port_struct_->sata_status & 0x103) != 0x103) {
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return;
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return;
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}
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}
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uint64_t cl_page = port_struct_->command_list_base & (~0xFFF);
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uint64_t fis_page = port_struct_->fis_base & (~0xFFF);
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if (cl_page != fis_page) {
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// 0x0-0x400 -> Command List
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crash("Non adjacent cl & fis", glcr::UNIMPLEMENTED);
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// 0x400-0x500 -> Received FIS
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}
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// 0x500-0x2500 -> Command Tables (0x100 each) (Max PRDT Length is 8 for now)
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command_structures_ = MappedMemoryRegion::ContiguousPhysical(0x2500);
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uint64_t paddr = command_structures_.paddr();
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command_structures_ = MappedMemoryRegion::DirectPhysical(cl_page, 0x1000);
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command_list_ = reinterpret_cast<CommandList*>(command_structures_.vaddr());
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port_struct_->command_list_base = paddr;
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uint64_t cl_off = port_struct_->command_list_base & 0xFFF;
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command_list_ =
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reinterpret_cast<CommandList*>(command_structures_.vaddr() + cl_off);
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uint64_t fis_off = port_struct_->fis_base & 0xFFF;
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received_fis_ =
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received_fis_ =
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reinterpret_cast<ReceivedFis*>(command_structures_.vaddr() + fis_off);
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reinterpret_cast<ReceivedFis*>(command_structures_.vaddr() + 0x400);
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port_struct_->fis_base = paddr + 0x400;
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// FIXME: Hacky
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command_tables_ =
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uint64_t ct_off =
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reinterpret_cast<CommandTable*>(command_structures_.vaddr() + 0x500);
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command_list_->command_headers[0].command_table_base_addr & 0xFFF;
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command_table_ =
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reinterpret_cast<CommandTable*>(command_structures_.vaddr() + ct_off);
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for (uint64_t i = 0; i < 32; i++) {
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command_list_->command_headers[i].command_table_base_addr =
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(paddr + 0x500) + (0x100 * i);
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}
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port_struct_->interrupt_enable = 0xFFFFFFFF;
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port_struct_->interrupt_enable = 0xFFFFFFFF;
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// Reset the CMD and FRE bits since we move these structures.
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// FIXME: I think we need to poll these bits to make sure they become
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// 0 before setting them back to one.
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port_struct_->command &= ~(0x00000011);
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port_struct_->command |= 0x00000011;
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}
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}
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glcr::ErrorCode AhciDevice::IssueCommand(Command* command) {
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glcr::ErrorCode AhciDevice::IssueCommand(Command* command) {
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command->PopulateFis(command_table_->command_fis);
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command->PopulateFis(command_tables_->command_fis);
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command->PopulatePrdt(command_table_->prdt);
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command->PopulatePrdt(command_tables_->prdt);
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command_list_->command_headers[0].command =
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command_list_->command_headers[0].command =
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(sizeof(HostToDeviceRegisterFis) / 2) & 0x1F;
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(sizeof(HostToDeviceRegisterFis) / 2) & 0x1F;
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@ -62,7 +65,7 @@ void AhciDevice::DumpInfo() {
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dbgln("Int enable: %x", port_struct_->interrupt_enable);
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dbgln("Int enable: %x", port_struct_->interrupt_enable);
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// Just dump one command info for now.
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// Just dump one command info for now.
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for (uint64_t i = 0; i < 1; i++) {
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for (uint64_t i = 0; i < 32; i++) {
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dbgln("Command Header: %u", i);
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dbgln("Command Header: %u", i);
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dbgln("Command %x", command_list_->command_headers[i].command);
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dbgln("Command %x", command_list_->command_headers[i].command);
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dbgln("PRD Len: %x", command_list_->command_headers[i].prd_table_length);
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dbgln("PRD Len: %x", command_list_->command_headers[i].prd_table_length);
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@ -72,7 +75,7 @@ void AhciDevice::DumpInfo() {
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}
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}
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void AhciDevice::HandleIrq() {
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void AhciDevice::HandleIrq() {
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uint64_t int_status = port_struct_->interrupt_status;
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uint32_t int_status = port_struct_->interrupt_status;
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// FIXME: Probably only clear the interrupts we know how to handle.
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// FIXME: Probably only clear the interrupts we know how to handle.
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port_struct_->interrupt_status = int_status;
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port_struct_->interrupt_status = int_status;
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@ -30,7 +30,7 @@ class AhciDevice {
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CommandList* command_list_ = nullptr;
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CommandList* command_list_ = nullptr;
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ReceivedFis* received_fis_ = nullptr;
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ReceivedFis* received_fis_ = nullptr;
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CommandTable* command_table_ = nullptr;
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CommandTable* command_tables_ = nullptr;
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Command* commands_[32];
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Command* commands_[32];
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volatile uint32_t commands_issued_ = 0;
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volatile uint32_t commands_issued_ = 0;
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@ -32,12 +32,12 @@ glcr::ErrorOr<glcr::UniquePtr<AhciDriver>> AhciDriver::Init(
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uint64_t ahci_phys) {
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uint64_t ahci_phys) {
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PciDeviceHeader* header = LoadPciDeviceHeader(ahci_phys);
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PciDeviceHeader* header = LoadPciDeviceHeader(ahci_phys);
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glcr::UniquePtr<AhciDriver> driver(new AhciDriver(header));
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glcr::UniquePtr<AhciDriver> driver(new AhciDriver(header));
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// RET_ERR(driver.LoadCapabilities());
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// RET_ERR(driver->LoadCapabilities());
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RET_ERR(driver->LoadHbaRegisters());
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RET_ERR(driver->LoadHbaRegisters());
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RET_ERR(driver->LoadDevices());
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RET_ERR(driver->LoadDevices());
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RET_ERR(driver->RegisterIrq());
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RET_ERR(driver->RegisterIrq());
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// driver.DumpCapabilities();
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// driver->DumpCapabilities();
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// driver.DumpPorts();
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// driver->DumpPorts();
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return driver;
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return driver;
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}
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}
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