Working AHCI DMA IPC from yellowstone to denali.
We have a weird bug in context switching where a process's rsp0 ends up pointing at the wrong value sometimes which crashes the OS.
This commit is contained in:
parent
ccfe1b15ab
commit
e5da93757a
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@ -1,6 +1,7 @@
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add_executable(denali
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add_executable(denali
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ahci/ahci_device.cpp
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ahci/ahci_device.cpp
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ahci/ahci_driver.cpp
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ahci/ahci_driver.cpp
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ahci/command.cpp
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denali.cpp
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denali.cpp
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denali_server.cpp
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denali_server.cpp
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)
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)
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@ -96,7 +96,7 @@ struct CommandTable {
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uint8_t command_fis[64];
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uint8_t command_fis[64];
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uint8_t atapi_command[16];
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uint8_t atapi_command[16];
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uint8_t reserved[48];
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uint8_t reserved[48];
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PhysicalRegionDescriptor prds[65535];
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PhysicalRegionDescriptor prdt[65535];
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} __attribute__((packed));
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} __attribute__((packed));
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typedef enum {
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typedef enum {
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@ -4,12 +4,6 @@
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#include <string.h>
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#include <string.h>
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#include <zcall.h>
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#include <zcall.h>
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namespace {
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void HandleIdent(AhciDevice* dev) { dev->HandleIdentify(); }
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} // namespace
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AhciDevice::AhciDevice(AhciPort* port) : port_struct_(port) {
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AhciDevice::AhciDevice(AhciPort* port) : port_struct_(port) {
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if ((port_struct_->sata_status & 0x103) != 0x103) {
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if ((port_struct_->sata_status & 0x103) != 0x103) {
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return;
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return;
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@ -38,59 +32,25 @@ AhciDevice::AhciDevice(AhciPort* port) : port_struct_(port) {
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reinterpret_cast<CommandTable*>(command_structures_.vaddr() + ct_off);
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reinterpret_cast<CommandTable*>(command_structures_.vaddr() + ct_off);
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port_struct_->interrupt_enable = 0xFFFFFFFF;
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port_struct_->interrupt_enable = 0xFFFFFFFF;
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if (port_struct_->signature == 0x101) {
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SendIdentify();
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}
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}
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}
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z_err_t AhciDevice::SendIdentify() {
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z_err_t AhciDevice::IssueCommand(Command* command) {
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HostToDeviceRegisterFis fis{
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command->PopulateFis(command_table_->command_fis);
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.fis_type = FIS_TYPE_REG_H2D,
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command->PopulatePrdt(command_table_->prdt);
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.pmp_and_c = 0x80,
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.command = 0xEC,
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.featurel = 0,
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.lba0 = 0,
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command_list_->command_headers[0].command =
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.lba1 = 0,
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(sizeof(HostToDeviceRegisterFis) / 2) & 0x1F;
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.lba2 = 0,
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.device = 0,
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.lba3 = 0,
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.lba4 = 0,
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.lba5 = 0,
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.featureh = 0,
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.count = 0,
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.icc = 0,
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.control = 0,
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.reserved = 0,
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};
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command_list_->command_headers[0].command = (sizeof(fis) / 2) & 0x1F;
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command_list_->command_headers[0].prd_table_length = 1;
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command_list_->command_headers[0].prd_table_length = 1;
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command_list_->command_headers[0].prd_byte_count = 0;
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memcpy(command_table_->command_fis, &fis, sizeof(fis));
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commands_[0] = command;
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commands_[0].region = MappedMemoryRegion::ContiguousPhysical(512);
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// commands_[0].callback = HandleIdent;
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command_table_->prds[0].region_address = commands_[0].region.paddr();
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command_table_->prds[0].byte_count = 512;
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port_struct_->command_issue |= 1;
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commands_issued_ |= 1;
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commands_issued_ |= 1;
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port_struct_->command_issue |= 1;
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return Z_OK;
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return Z_OK;
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}
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}
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void AhciDevice::HandleIdentify() {
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dbgln("Handling Idenify");
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uint16_t* ident = reinterpret_cast<uint16_t*>(commands_[0].region.vaddr());
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dbgln("Ident: %x", ident[0]);
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}
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void AhciDevice::DumpInfo() {
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void AhciDevice::DumpInfo() {
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dbgln("Comlist: %lx", port_struct_->command_list_base);
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dbgln("Comlist: %lx", port_struct_->command_list_base);
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dbgln("FIS: %lx", port_struct_->fis_base);
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dbgln("FIS: %lx", port_struct_->fis_base);
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@ -116,11 +76,15 @@ void AhciDevice::HandleIrq() {
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port_struct_->interrupt_status = int_status;
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port_struct_->interrupt_status = int_status;
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uint32_t commands_finished = commands_issued_ & ~port_struct_->command_issue;
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uint32_t commands_finished = commands_issued_ & ~port_struct_->command_issue;
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dbgln("finished %x", commands_finished);
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dbgln("status %x", int_status);
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dbgln("Issued %x, %x", commands_issued_, port_struct_->command_issue);
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// FIXME: Pass error codes to the callback.
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for (uint64_t i = 0; i < 32; i++) {
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for (uint64_t i = 0; i < 32; i++) {
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if (commands_finished & (1 << i)) {
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if (commands_finished & (1 << i)) {
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// commands_[i].callback(this);
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commands_issued_ &= ~(1 << i);
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commands_issued_ &= ~(1 << i);
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commands_[i]->Callback();
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}
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}
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}
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}
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@ -134,6 +98,7 @@ void AhciDevice::HandleIrq() {
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}
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}
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if (fis.error) {
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if (fis.error) {
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dbgln("D2H err: %x", fis.error);
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dbgln("D2H err: %x", fis.error);
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dbgln("status: %x", fis.status);
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}
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}
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}
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}
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if (int_status & 0x2) {
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if (int_status & 0x2) {
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@ -4,6 +4,7 @@
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#include <zerrors.h>
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#include <zerrors.h>
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#include "ahci/ahci.h"
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#include "ahci/ahci.h"
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#include "ahci/command.h"
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class AhciDevice {
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class AhciDevice {
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public:
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public:
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bool IsInit() { return port_struct_ != nullptr && command_structures_; }
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bool IsInit() { return port_struct_ != nullptr && command_structures_; }
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z_err_t SendIdentify();
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z_err_t IssueCommand(Command* command);
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void HandleIdentify();
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void HandleIrq();
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void HandleIrq();
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AhciDevice(const AhciDevice&) = delete;
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AhciDevice& operator=(const AhciDevice&) = delete;
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private:
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private:
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AhciPort* port_struct_ = nullptr;
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AhciPort* port_struct_ = nullptr;
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MappedMemoryRegion command_structures_;
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MappedMemoryRegion command_structures_;
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@ -28,10 +31,6 @@ class AhciDevice {
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ReceivedFis* received_fis_ = nullptr;
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ReceivedFis* received_fis_ = nullptr;
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CommandTable* command_table_ = nullptr;
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CommandTable* command_table_ = nullptr;
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struct Command {
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Command* commands_[32];
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MappedMemoryRegion region;
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volatile uint32_t commands_issued_ = 0;
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// std::function<void(MappedMemoryRegion)> callback;
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};
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Command commands_[32];
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uint32_t commands_issued_ = 0;
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};
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};
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@ -33,16 +33,16 @@ z_err_t AhciDriver::Init() {
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return Z_OK;
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return Z_OK;
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}
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}
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z_err_t AhciDriver::GetDevice(uint64_t id, AhciDevice& device) {
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z_err_t AhciDriver::GetDevice(uint64_t id, AhciDevice** device) {
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if (id >= 32) {
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if (id >= 32) {
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return Z_ERR_INVALID;
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return Z_ERR_INVALID;
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}
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}
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if (!devices_[id].IsInit()) {
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if (devices_[id] != nullptr && !devices_[id]->IsInit()) {
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return Z_ERR_NOT_FOUND;
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return Z_ERR_NOT_FOUND;
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}
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}
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device = devices_[id];
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*device = devices_[id];
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return Z_OK;
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return Z_OK;
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}
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}
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@ -126,24 +126,27 @@ void AhciDriver::DumpCapabilities() {
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void AhciDriver::DumpPorts() {
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void AhciDriver::DumpPorts() {
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for (uint64_t i = 0; i < 6; i++) {
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for (uint64_t i = 0; i < 6; i++) {
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AhciDevice& dev = devices_[i];
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AhciDevice* dev = devices_[i];
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if (!dev.IsInit()) {
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if (dev == nullptr || !dev->IsInit()) {
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continue;
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continue;
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}
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}
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dbgln("");
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dbgln("");
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dbgln("Port %u:", i);
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dbgln("Port %u:", i);
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dev.DumpInfo();
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dev->DumpInfo();
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}
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}
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}
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}
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void AhciDriver::InterruptLoop() {
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void AhciDriver::InterruptLoop() {
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dbgln("Starting interrupt loop");
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while (true) {
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while (true) {
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uint64_t type, bytes, caps;
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uint64_t type, bytes, caps;
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check(ZPortRecv(irq_port_cap_, 0, 0, 0, 0, &type, &bytes, &caps));
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check(ZPortRecv(irq_port_cap_, 0, 0, 0, 0, &type, &bytes, &caps));
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for (uint64_t i = 0; i < 32; i++) {
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for (uint64_t i = 0; i < 32; i++) {
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if (devices_[i].IsInit() && (ahci_hba_->interrupt_status & (1 << i))) {
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if (devices_[i] != nullptr && devices_[i]->IsInit() &&
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devices_[i].HandleIrq();
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(ahci_hba_->interrupt_status & (1 << i))) {
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dbgln("Interrupt for %u", i);
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devices_[i]->HandleIrq();
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ahci_hba_->interrupt_status &= ~(1 << i);
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ahci_hba_->interrupt_status &= ~(1 << i);
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}
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}
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}
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}
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@ -212,7 +215,7 @@ z_err_t AhciDriver::LoadDevices() {
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}
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}
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uint64_t port_addr =
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uint64_t port_addr =
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reinterpret_cast<uint64_t>(ahci_hba_) + 0x100 + (0x80 * i);
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reinterpret_cast<uint64_t>(ahci_hba_) + 0x100 + (0x80 * i);
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devices_[i] = AhciDevice(reinterpret_cast<AhciPort*>(port_addr));
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devices_[i] = new AhciDevice(reinterpret_cast<AhciPort*>(port_addr));
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}
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}
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return Z_OK;
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return Z_OK;
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}
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}
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@ -12,7 +12,7 @@ class AhciDriver {
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void InterruptLoop();
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void InterruptLoop();
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z_err_t GetDevice(uint64_t id, AhciDevice& device);
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z_err_t GetDevice(uint64_t id, AhciDevice** device);
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void DumpCapabilities();
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void DumpCapabilities();
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void DumpPorts();
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void DumpPorts();
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@ -24,7 +24,7 @@ class AhciDriver {
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AhciHba* ahci_hba_ = nullptr;
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AhciHba* ahci_hba_ = nullptr;
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// TODO: Allocate these dynamically.
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// TODO: Allocate these dynamically.
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AhciDevice devices_[32];
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AhciDevice* devices_[32];
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Thread irq_thread_;
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Thread irq_thread_;
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uint64_t irq_port_cap_ = 0;
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uint64_t irq_port_cap_ = 0;
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@ -0,0 +1,49 @@
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#include "ahci/command.h"
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#include <string.h>
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#include "ahci/ahci.h"
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Command::~Command() {}
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DmaReadCommand::DmaReadCommand(uint64_t lba, uint64_t sector_cnt,
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DmaCallback callback)
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: lba_(lba), sector_cnt_(sector_cnt), callback_(callback) {
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region_ = MappedMemoryRegion::ContiguousPhysical(sector_cnt * 512);
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}
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DmaReadCommand::~DmaReadCommand() {}
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void DmaReadCommand::PopulateFis(uint8_t* command_fis) {
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HostToDeviceRegisterFis fis{
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.fis_type = FIS_TYPE_REG_H2D,
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.pmp_and_c = 0x80,
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.command = 0x25,
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.featurel = 0,
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.lba0 = static_cast<uint8_t>(lba_ & 0xFF),
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.lba1 = static_cast<uint8_t>((lba_ >> 8) & 0xFF),
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.lba2 = static_cast<uint8_t>((lba_ >> 16) & 0xFF),
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.device = (1 << 6), // ATA LBA Mode
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.lba3 = static_cast<uint8_t>((lba_ >> 24) & 0xFF),
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.lba4 = static_cast<uint8_t>((lba_ >> 32) & 0xFF),
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.lba5 = static_cast<uint8_t>((lba_ >> 40) & 0xFF),
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.featureh = 0,
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.count = static_cast<uint16_t>(sector_cnt_),
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.icc = 0,
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.control = 0,
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.reserved = 0,
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};
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uint64_t bytes = sector_cnt_ * 512;
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memcpy(command_fis, &fis, sizeof(fis));
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}
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void DmaReadCommand::PopulatePrdt(PhysicalRegionDescriptor* prdt) {
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prdt[0].region_address = region_.paddr();
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prdt[0].byte_count = region_.size();
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}
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void DmaReadCommand::Callback() { callback_(lba_, sector_cnt_, region_.cap()); }
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@ -0,0 +1,33 @@
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#pragma once
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#include <mammoth/memory_region.h>
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#include <stdint.h>
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#include "ahci/ahci.h"
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class Command {
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public:
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virtual ~Command();
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virtual void PopulateFis(uint8_t* command_fis) = 0;
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virtual void PopulatePrdt(PhysicalRegionDescriptor* prdt) = 0;
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virtual void Callback() = 0;
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};
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class DmaReadCommand : public Command {
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public:
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typedef void (*DmaCallback)(uint64_t, uint64_t, uint64_t);
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DmaReadCommand(uint64_t lba, uint64_t sector_cnt, DmaCallback callback);
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virtual ~DmaReadCommand() override;
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void PopulateFis(uint8_t* command_fis) override;
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void PopulatePrdt(PhysicalRegionDescriptor* prdt) override;
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void Callback() override;
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private:
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uint64_t lba_;
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uint64_t sector_cnt_;
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DmaCallback callback_;
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MappedMemoryRegion region_;
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};
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@ -3,8 +3,17 @@
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#include <mammoth/debug.h>
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#include <mammoth/debug.h>
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#include <zcall.h>
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#include <zcall.h>
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namespace {
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DenaliServer* gServer = nullptr;
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void HandleResponse(uint64_t lba, uint64_t size, uint64_t cap) {
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gServer->HandleResponse(lba, size, cap);
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}
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} // namespace
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DenaliServer::DenaliServer(uint64_t channel_cap, AhciDriver& driver)
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DenaliServer::DenaliServer(uint64_t channel_cap, AhciDriver& driver)
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: channel_cap_(channel_cap), driver_(driver) {}
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: channel_cap_(channel_cap), driver_(driver) {
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gServer = this;
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}
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z_err_t DenaliServer::RunServer() {
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z_err_t DenaliServer::RunServer() {
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while (true) {
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while (true) {
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@ -20,12 +29,7 @@ z_err_t DenaliServer::RunServer() {
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case DENALI_READ: {
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case DENALI_READ: {
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DenaliRead* read_req = reinterpret_cast<DenaliRead*>(read_buffer_);
|
DenaliRead* read_req = reinterpret_cast<DenaliRead*>(read_buffer_);
|
||||||
uint64_t memcap = 0;
|
uint64_t memcap = 0;
|
||||||
DenaliReadResponse resp;
|
RET_ERR(HandleRead(*read_req));
|
||||||
RET_ERR(HandleRead(*read_req, resp, memcap));
|
|
||||||
uint64_t caps_len = memcap ? 1 : 0;
|
|
||||||
RET_ERR(ZChannelSend(channel_cap_, 0, sizeof(DenaliReadResponse),
|
|
||||||
reinterpret_cast<uint8_t*>(&resp), caps_len,
|
|
||||||
&memcap));
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
|
@ -35,10 +39,22 @@ z_err_t DenaliServer::RunServer() {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
z_err_t DenaliServer::HandleRead(const DenaliRead& read,
|
z_err_t DenaliServer::HandleRead(const DenaliRead& read) {
|
||||||
DenaliReadResponse& resp, uint64_t& memcap) {
|
AhciDevice* device;
|
||||||
AhciDevice device;
|
RET_ERR(driver_.GetDevice(read.device_id, &device));
|
||||||
RET_ERR(driver_.GetDevice(read.device_id, device));
|
|
||||||
|
device->IssueCommand(
|
||||||
|
new DmaReadCommand(read.lba, read.size, ::HandleResponse));
|
||||||
|
|
||||||
return Z_OK;
|
return Z_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void DenaliServer::HandleResponse(uint64_t lba, uint64_t size, uint64_t cap) {
|
||||||
|
DenaliReadResponse resp{
|
||||||
|
.device_id = 0,
|
||||||
|
.lba = lba,
|
||||||
|
.size = size,
|
||||||
|
};
|
||||||
|
check(ZChannelSend(channel_cap_, DENALI_READ, sizeof(resp),
|
||||||
|
reinterpret_cast<uint8_t*>(&resp), 1, &cap));
|
||||||
|
}
|
||||||
|
|
|
@ -9,6 +9,8 @@ class DenaliServer {
|
||||||
|
|
||||||
z_err_t RunServer();
|
z_err_t RunServer();
|
||||||
|
|
||||||
|
void HandleResponse(uint64_t lba, uint64_t size, uint64_t cap);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
static const uint64_t kBuffSize = 1024;
|
static const uint64_t kBuffSize = 1024;
|
||||||
uint64_t channel_cap_;
|
uint64_t channel_cap_;
|
||||||
|
@ -16,6 +18,5 @@ class DenaliServer {
|
||||||
|
|
||||||
AhciDriver& driver_;
|
AhciDriver& driver_;
|
||||||
|
|
||||||
z_err_t HandleRead(const DenaliRead& read, DenaliReadResponse& resp,
|
z_err_t HandleRead(const DenaliRead& read);
|
||||||
uint64_t& mem_cap);
|
|
||||||
};
|
};
|
||||||
|
|
|
@ -6,14 +6,34 @@
|
||||||
|
|
||||||
#include "hw/pcie.h"
|
#include "hw/pcie.h"
|
||||||
|
|
||||||
uint64_t main() {
|
int main() {
|
||||||
dbgln("Yellowstone Initializing.");
|
dbgln("Yellowstone Initializing.");
|
||||||
uint64_t vaddr;
|
uint64_t vaddr;
|
||||||
check(ZAddressSpaceMap(Z_INIT_VMAS_SELF, 0, Z_INIT_BOOT_VMMO, &vaddr));
|
check(ZAddressSpaceMap(Z_INIT_VMAS_SELF, 0, Z_INIT_BOOT_VMMO, &vaddr));
|
||||||
|
|
||||||
Channel local;
|
Channel local;
|
||||||
check(SpawnProcessFromElfRegion(vaddr, local));
|
check(SpawnProcessFromElfRegion(vaddr, local));
|
||||||
local.WriteStr("Hello!");
|
|
||||||
|
DenaliRead read{
|
||||||
|
.device_id = 0,
|
||||||
|
.lba = 0,
|
||||||
|
.size = 1,
|
||||||
|
};
|
||||||
|
check(ZChannelSend(local.cap(), DENALI_READ, sizeof(DenaliRead),
|
||||||
|
reinterpret_cast<uint8_t*>(&read), 0, nullptr));
|
||||||
|
|
||||||
|
DenaliReadResponse resp;
|
||||||
|
uint64_t mem_cap, type, bytes, caps;
|
||||||
|
|
||||||
|
check(ZChannelRecv(local.cap(), sizeof(resp),
|
||||||
|
reinterpret_cast<uint8_t*>(&resp), 1, &mem_cap, &type,
|
||||||
|
&bytes, &caps));
|
||||||
|
|
||||||
|
dbgln("Resp: %u", type);
|
||||||
|
|
||||||
|
check(ZAddressSpaceMap(Z_INIT_VMAS_SELF, 0, mem_cap, &vaddr));
|
||||||
|
uint32_t* mbr = reinterpret_cast<uint32_t*>(vaddr + 0x1FE);
|
||||||
|
dbgln("MBR: %x", *mbr);
|
||||||
|
|
||||||
DumpPciEDevices();
|
DumpPciEDevices();
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue