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2 Commits
c97d39c36b
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b270c7c9aa
Author | SHA1 | Date |
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b270c7c9aa | |
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caa1b9c952 |
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@ -1,5 +1,9 @@
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use core::array;
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use core::future::Future;
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use core::ops::Deref;
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use core::ops::DerefMut;
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use core::ops::DerefMut;
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use core::ptr::addr_of_mut;
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use core::pin::Pin;
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use core::task::{Context, Poll, Waker};
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use alloc::boxed::Box;
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use alloc::boxed::Box;
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use alloc::sync::Arc;
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use alloc::sync::Arc;
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@ -73,8 +77,36 @@ impl AhciController {
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fn init(&mut self) {
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fn init(&mut self) {
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self.hba.lock().init();
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self.hba.lock().init();
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let hba = self.hba.lock();
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for i in 0..(hba.capabilities.read().num_ports() as usize) {
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let port_index = 1 << i;
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if (hba.port_implemented.read() & port_index) != port_index {
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mammoth::debug!("Skipping port {}, not implemented", i);
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continue;
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}
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self.init_ports().unwrap();
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let port_offset: usize = 0x100 + (0x80 * i);
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let port = unsafe {
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((self.hba_vaddr as usize + port_offset) as *mut AhciPortHba)
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.as_mut()
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.unwrap()
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};
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let sata_status = port.sata_status.read();
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if (sata_status.device_detection() != AhciDeviceDetection::CommunicationEstablished)
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|| (sata_status.interface_power_management()
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!= AhciInterfacePowerManagement::Active)
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{
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mammoth::debug!(
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"Skipping port {}, no communcation. Status: {:?}",
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i,
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sata_status
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);
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continue;
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}
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self.ports[i] = Some(PortController::new(port));
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}
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}
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}
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fn irq_num(&self) -> u64 {
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fn irq_num(&self) -> u64 {
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@ -105,37 +137,36 @@ impl AhciController {
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}
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}
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}
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}
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fn init_ports(&mut self) -> Result<(), ZError> {
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pub async fn identify_ports(&self) -> Result<(), ZError> {
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let hba = self.hba.lock();
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for port in self.ports.iter().flatten() {
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for i in 0..(hba.capabilities.read().num_ports() as usize) {
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let sig = port.get_signature();
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let port_index = 1 << i;
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if sig == 0x101 {
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if (hba.port_implemented.read() & port_index) != port_index {
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let command = Command::identify()?;
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mammoth::debug!("Skipping port {}, not implemented", i);
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mammoth::debug!("IDENT!");
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continue;
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port.issue_command(&command)?.await;
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}
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let ident = command.memory_region.slice::<u16>();
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let new_sector_size = if ident[106] & (1 << 12) != 0 {
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let port_offset: usize = 0x100 + (0x80 * i);
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ident[117] as u32 | ((ident[118] as u32) << 16)
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let port = unsafe {
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} else {
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((self.hba_vaddr as usize + port_offset) as *mut AhciPortHba)
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512
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.as_mut()
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.unwrap()
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};
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};
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let sata_status = port.sata_status.read();
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let lba_count = if ident[83] & (1 << 10) != 0 {
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if (sata_status.device_detection() != AhciDeviceDetection::CommunicationEstablished)
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ident[100] as u64
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|| (sata_status.interface_power_management()
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| (ident[101] as u64) << 16
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!= AhciInterfacePowerManagement::Active)
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| (ident[102] as u64) << 32
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{
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| (ident[103] as u64) << 48
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mammoth::debug!(
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} else {
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"Skipping port {}, no communcation. Status: {:?}",
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ident[60] as u64 | (ident[61] as u64) << 16
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i,
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};
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sata_status
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mammoth::debug!("Sector size: {:#0x}", new_sector_size);
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);
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mammoth::debug!("LBA Count: {:#0x}", lba_count);
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continue;
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}
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self.ports[i] = Some(PortController::new(port));
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//self.sector_size = Some(new_sector_size as u64);
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self.ports[i].as_mut().unwrap().identify()?;
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//self.sector_cnt = Some(lba_count);
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} else {
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mammoth::debug!("Skipping non-sata sig: {:#0x}", sig);
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}
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}
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}
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Ok(())
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Ok(())
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}
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}
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@ -151,12 +182,60 @@ pub fn spawn_irq_thread(controller: Arc<AhciController>) -> thread::JoinHandle {
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});
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});
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loop {
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loop {
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irq_port.recv_null().unwrap();
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irq_port.recv_null().unwrap();
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mammoth::debug!("Interrupt!");
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controller.handle_irq();
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controller.handle_irq();
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}
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}
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};
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};
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thread::spawn(irq_thread)
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thread::spawn(irq_thread)
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}
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}
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pub async fn identify_ports(controller: Arc<AhciController>) {
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controller.identify_ports().await.unwrap();
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}
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enum CommandStatus {
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Empty,
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NotSent,
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Pending(Waker),
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Complete,
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}
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struct CommandFuture {
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status: Arc<Mutex<CommandStatus>>,
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trigger: Box<dyn Fn() + Sync>,
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}
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impl CommandFuture {
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fn new(status: Arc<Mutex<CommandStatus>>, trigger: Box<dyn Fn() + Sync>) -> Self {
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Self { status, trigger }
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}
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}
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impl Drop for CommandFuture {
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fn drop(&mut self) {
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*self.status.lock() = CommandStatus::Empty;
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}
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}
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impl Future for CommandFuture {
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type Output = ();
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fn poll(mut self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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let s = self.deref_mut();
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let mut status = s.status.lock();
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match status.deref() {
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CommandStatus::NotSent => {
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*status = CommandStatus::Pending(cx.waker().clone());
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(s.trigger)();
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Poll::Pending
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}
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CommandStatus::Pending(_) => Poll::Pending,
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CommandStatus::Complete => Poll::Ready(()),
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CommandStatus::Empty => panic!("Polling empty command slot"),
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}
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}
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}
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struct Command {
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struct Command {
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command: SataCommand,
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command: SataCommand,
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lba: u64,
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lba: u64,
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@ -165,12 +244,10 @@ struct Command {
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#[allow(dead_code)] // We need to own this even if we never access it.
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#[allow(dead_code)] // We need to own this even if we never access it.
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memory_region: MemoryRegion,
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memory_region: MemoryRegion,
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callback_internal: Box<dyn Fn(&Self) + Sync + Send + 'static>,
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}
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}
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impl Command {
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impl Command {
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pub fn identify(callback: Box<dyn Fn(&Self) + Sync + Send + 'static>) -> Result<Self, ZError> {
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pub fn identify() -> Result<Self, ZError> {
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let (memory_region, paddr) = MemoryRegion::contiguous_physical(512)?;
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let (memory_region, paddr) = MemoryRegion::contiguous_physical(512)?;
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Ok(Self {
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Ok(Self {
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@ -179,13 +256,8 @@ impl Command {
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sector_cnt: 1,
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sector_cnt: 1,
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paddr,
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paddr,
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memory_region,
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memory_region,
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callback_internal: callback,
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})
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})
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}
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}
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pub fn callback(&self) {
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(self.callback_internal)(self);
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}
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}
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}
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impl From<&Command> for HostToDeviceRegisterFis {
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impl From<&Command> for HostToDeviceRegisterFis {
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@ -194,17 +266,17 @@ impl From<&Command> for HostToDeviceRegisterFis {
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}
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}
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}
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}
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struct PortController {
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struct CommandStructures {
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ahci_port_hba: Mutex<&'static mut AhciPortHba>,
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command_list: &'static mut CommandList,
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command_list: &'static mut CommandList,
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received_fis: &'static mut ReceivedFis,
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received_fis: &'static mut ReceivedFis,
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command_tables: &'static mut [CommandTable; 32],
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command_tables: &'static mut [CommandTable; 32],
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}
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command_slots: Mutex<[Option<Arc<Command>>; 32]>,
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struct PortController {
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ahci_port_hba: Arc<Mutex<&'static mut AhciPortHba>>,
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command_structures: Mutex<CommandStructures>,
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// FIXME: These should probably be something like a OnceCell (or OnceLock).
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command_slots: [Arc<Mutex<CommandStatus>>; 32],
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sector_size: Arc<Mutex<Option<u64>>>,
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sector_cnt: Arc<Mutex<Option<u64>>>,
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}
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}
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impl PortController {
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impl PortController {
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@ -230,76 +302,61 @@ impl PortController {
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(command_paddr + 0x500) + (0x100 * (i as u64));
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(command_paddr + 0x500) + (0x100 * (i as u64));
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}
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}
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let command_slots = array::from_fn(|_| Arc::new(Mutex::new(CommandStatus::Empty)));
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Self {
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Self {
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ahci_port_hba: Mutex::new(ahci_port_hba),
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ahci_port_hba: Arc::new(Mutex::new(ahci_port_hba)),
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command_structures: Mutex::new(CommandStructures {
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command_list,
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command_list,
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received_fis,
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received_fis,
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command_tables,
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command_tables,
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command_slots: Mutex::new([const { None }; 32]),
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}),
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sector_size: Arc::new(Mutex::new(None)),
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command_slots,
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sector_cnt: Arc::new(Mutex::new(None)),
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}
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}
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}
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}
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pub fn identify(&mut self) -> Result<(), ZError> {
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fn get_signature(&self) -> u32 {
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let sig = self.ahci_port_hba.lock().signature.read();
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self.ahci_port_hba.lock().signature.read()
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if sig == 0x101 {
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let sector_size = self.sector_size.clone();
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let sector_cnt = self.sector_cnt.clone();
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let callback = move |c: &Command| {
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mammoth::debug!("TESTING");
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let ident = c.memory_region.slice::<u16>();
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let new_sector_size = if ident[106] & (1 << 12) != 0 {
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ident[117] as u32 | ((ident[118] as u32) << 16)
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} else {
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512
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};
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let lba_count = if ident[83] & (1 << 10) != 0 {
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ident[100] as u64
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| (ident[101] as u64) << 16
|
|
||||||
| (ident[102] as u64) << 32
|
|
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| (ident[103] as u64) << 48
|
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} else {
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ident[60] as u64 | (ident[61] as u64) << 16
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|
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};
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mammoth::debug!("Sector size: {:#0x}", new_sector_size);
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|
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mammoth::debug!("LBA Count: {:#0x}", lba_count);
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let _ = sector_size
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.lock()
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.deref_mut()
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.insert(new_sector_size as u64);
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let _ = sector_cnt.lock().deref_mut().insert(lba_count);
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};
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self.issue_command(Arc::from(Command::identify(Box::new(callback))?))?;
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} else {
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|
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mammoth::debug!("Skipping non-sata sig: {:#0x}", sig);
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|
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}
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Ok(())
|
|
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}
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}
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fn issue_command(&mut self, command: Arc<Command>) -> Result<(), ZError> {
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fn issue_command(&self, command: &Command) -> Result<CommandFuture, ZError> {
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let slot = self.select_slot()?;
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let slot = self.select_slot()?;
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self.command_slots.lock()[slot] = Some(command.clone());
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let command_slot = self.command_slots[slot].clone();
|
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|
|
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self.command_tables[slot].command_fis.host_to_device = command.clone().as_ref().into();
|
let ahci_port_hba_clone = self.ahci_port_hba.clone();
|
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|
let slot_clone = slot;
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let future = CommandFuture::new(
|
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|
command_slot,
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Box::new(move || {
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ahci_port_hba_clone.lock().issue_command(slot_clone);
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|
}),
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|
);
|
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|
|
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self.command_tables[slot].prdt[0].region_address = command.paddr;
|
let mut command_structures = self.command_structures.lock();
|
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self.command_tables[slot].prdt[0].byte_count = 512 * (command.sector_cnt as u32);
|
|
||||||
|
|
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self.command_list[slot].prd_table_length = 1;
|
command_structures.command_tables[slot]
|
||||||
|
.command_fis
|
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|
.host_to_device = command.into();
|
||||||
|
|
||||||
self.command_list[slot].command = (size_of::<HostToDeviceRegisterFis>() as u16 / 4) & 0x1F;
|
command_structures.command_tables[slot].prdt[0].region_address = command.paddr;
|
||||||
self.command_list[slot].command |= 1 << 7;
|
command_structures.command_tables[slot].prdt[0].byte_count =
|
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self.ahci_port_hba.lock().issue_command(slot);
|
512 * (command.sector_cnt as u32);
|
||||||
Ok(())
|
|
||||||
|
command_structures.command_list[slot].prd_table_length = 1;
|
||||||
|
|
||||||
|
command_structures.command_list[slot].command =
|
||||||
|
(size_of::<HostToDeviceRegisterFis>() as u16 / 4) & 0x1F;
|
||||||
|
command_structures.command_list[slot].command |= 1 << 7;
|
||||||
|
|
||||||
|
Ok(future)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn select_slot(&self) -> Result<usize, ZError> {
|
fn select_slot(&self) -> Result<usize, ZError> {
|
||||||
let slots = self.command_slots.lock();
|
// TODO: We have a race condition here.
|
||||||
for i in 0..slots.len() {
|
for i in 0..self.command_slots.len() {
|
||||||
if slots[i].is_none() {
|
let mut slot = self.command_slots[i].lock();
|
||||||
|
if matches!(*slot, CommandStatus::Empty) {
|
||||||
|
*slot = CommandStatus::NotSent;
|
||||||
return Ok(i);
|
return Ok(i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -309,20 +366,18 @@ impl PortController {
|
||||||
fn handle_interrupt(&self) {
|
fn handle_interrupt(&self) {
|
||||||
let int_status = self.ahci_port_hba.lock().interrupt_status.read();
|
let int_status = self.ahci_port_hba.lock().interrupt_status.read();
|
||||||
if int_status.device_to_host_register_fis_interrupt() {
|
if int_status.device_to_host_register_fis_interrupt() {
|
||||||
|
let received_fis = self
|
||||||
|
.command_structures
|
||||||
|
.lock()
|
||||||
|
.received_fis
|
||||||
|
.device_to_host_register_fis;
|
||||||
assert_eq!(
|
assert_eq!(
|
||||||
self.received_fis.device_to_host_register_fis.fis_type as u8,
|
received_fis.fis_type as u8,
|
||||||
FisType::RegisterDeviceToHost as u8
|
FisType::RegisterDeviceToHost as u8
|
||||||
);
|
);
|
||||||
if self.received_fis.device_to_host_register_fis.error != 0 {
|
if received_fis.error != 0 {
|
||||||
mammoth::debug!(
|
mammoth::debug!("D2H err: {:#0x}", received_fis.error);
|
||||||
"D2H err: {:#0x}",
|
mammoth::debug!("Status: {:#0x}", received_fis.status);
|
||||||
self.received_fis.device_to_host_register_fis.error
|
|
||||||
);
|
|
||||||
|
|
||||||
mammoth::debug!(
|
|
||||||
"Status: {:#0x}",
|
|
||||||
self.received_fis.device_to_host_register_fis.status
|
|
||||||
);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
self.ahci_port_hba.lock().interrupt_status.write(
|
self.ahci_port_hba.lock().interrupt_status.write(
|
||||||
|
@ -340,20 +395,19 @@ impl PortController {
|
||||||
let int_offset = 1 << i;
|
let int_offset = 1 << i;
|
||||||
|
|
||||||
// If there is no longer a command issued on a slot and we have something in
|
// If there is no longer a command issued on a slot and we have something in
|
||||||
// the command list we know that this is the command that finished.
|
// the command list that is pending we know that this is the command that finished.
|
||||||
// FIXME: This could cause a race condition when issuing a command if a different
|
if (self.ahci_port_hba.lock().command_issue.read() & int_offset) != int_offset {
|
||||||
// interrupt triggers between us setting the command in the command slot and
|
let mut command_status = self.command_slots[i].lock();
|
||||||
// actually issuing the command.
|
let mut did_complete = false;
|
||||||
if (self.ahci_port_hba.lock().command_issue.read() & int_offset) != int_offset
|
if let CommandStatus::Pending(ref waker) = command_status.deref() {
|
||||||
&& self.command_slots.lock()[i].is_some()
|
waker.wake_by_ref();
|
||||||
{
|
did_complete = true;
|
||||||
self.finish_command(i);
|
|
||||||
self.command_slots.lock()[i] = None;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
fn finish_command(&self, slot: usize) {
|
if did_complete {
|
||||||
self.command_slots.lock()[slot].as_ref().unwrap().callback()
|
*command_status = CommandStatus::Complete;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -3,5 +3,6 @@ mod controller;
|
||||||
mod hba;
|
mod hba;
|
||||||
mod port;
|
mod port;
|
||||||
|
|
||||||
|
pub use controller::identify_ports;
|
||||||
pub use controller::spawn_irq_thread;
|
pub use controller::spawn_irq_thread;
|
||||||
pub use controller::AhciController;
|
pub use controller::AhciController;
|
||||||
|
|
|
@ -4,9 +4,14 @@
|
||||||
extern crate alloc;
|
extern crate alloc;
|
||||||
|
|
||||||
use alloc::sync::Arc;
|
use alloc::sync::Arc;
|
||||||
use mammoth::{define_entry, sync::Mutex, zion::z_err_t};
|
use mammoth::{
|
||||||
|
define_entry,
|
||||||
|
sync::Mutex,
|
||||||
|
task::{Executor, Task},
|
||||||
|
zion::z_err_t,
|
||||||
|
};
|
||||||
|
|
||||||
use denali::ahci::{spawn_irq_thread, AhciController};
|
use denali::ahci::{identify_ports, spawn_irq_thread, AhciController};
|
||||||
|
|
||||||
define_entry!();
|
define_entry!();
|
||||||
|
|
||||||
|
@ -24,8 +29,14 @@ extern "C" fn main() -> z_err_t {
|
||||||
ahci_info.ahci_region,
|
ahci_info.ahci_region,
|
||||||
)));
|
)));
|
||||||
|
|
||||||
|
let mut executor = Executor::new();
|
||||||
|
|
||||||
|
executor.spawn(Task::new(identify_ports(ahci_controller.clone())));
|
||||||
|
|
||||||
let thread = spawn_irq_thread(ahci_controller.clone());
|
let thread = spawn_irq_thread(ahci_controller.clone());
|
||||||
|
|
||||||
|
executor.run();
|
||||||
|
|
||||||
thread.join().expect("Failed to wait on irq thread.");
|
thread.join().expect("Failed to wait on irq thread.");
|
||||||
0
|
0
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue