224 lines
6.9 KiB
C++
224 lines
6.9 KiB
C++
#include "ahci/ahci_port.h"
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#include <glacier/status/error.h>
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#include <mammoth/util/debug.h>
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#include <zcall.h>
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AhciPort::AhciPort(AhciPortHba* port) : port_struct_(port) {
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if ((port_struct_->sata_status & 0x103) != 0x103) {
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crash("Creating device on port without a device",
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glcr::FAILED_PRECONDITION);
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}
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// 0x0-0x400 -> Command List
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// 0x400-0x500 -> Received FIS
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// 0x500-0x2500 -> Command Tables (0x100 each) (Max PRDT Length is 8 for now)
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uint64_t paddr;
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command_structures_ =
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mmth::OwnedMemoryRegion::ContiguousPhysical(0x2500, &paddr);
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command_list_ = reinterpret_cast<CommandList*>(command_structures_.vaddr());
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port_struct_->command_list_base = paddr;
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received_fis_ =
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reinterpret_cast<ReceivedFis*>(command_structures_.vaddr() + 0x400);
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port_struct_->fis_base = paddr + 0x400;
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port_struct_->command |= kCommand_FIS_Receive_Enable;
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command_tables_ = glcr::ArrayView(
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reinterpret_cast<CommandTable*>(command_structures_.vaddr() + 0x500), 32);
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commands_issued_ = 0;
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command_signals_ = glcr::Array<mmth::Semaphore>(32);
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for (uint64_t i = 0; i < 32; i++) {
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// This leaves space for 2 prdt entries.
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command_list_->command_headers[i].command_table_base_addr =
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(paddr + 0x500) + (0x100 * i);
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}
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port_struct_->interrupt_enable = 0xFFFFFFFF;
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// kInterrupt_D2H_FIS | kInterrupt_PIO_FIS | kInterrupt_DMA_FIS |
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// kInterrupt_DeviceBits_FIS | kInterrupt_Unknown_FIS;
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port_struct_->sata_error = -1;
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port_struct_->command |= kCommand_Start;
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}
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glcr::ErrorCode AhciPort::Identify() {
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if (IsSata()) {
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CommandInfo identify{
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.command = kIdentifyDevice,
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.lba = 0,
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.sectors = 1,
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.paddr = 0,
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};
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auto region =
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mmth::OwnedMemoryRegion::ContiguousPhysical(0x200, &identify.paddr);
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ASSIGN_OR_RETURN(auto* sem, IssueCommand(identify));
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sem->Wait();
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uint16_t* ident = reinterpret_cast<uint16_t*>(region.vaddr());
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if (ident[106] & (1 << 12)) {
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sector_size_ = *reinterpret_cast<uint32_t*>(ident + 117);
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} else {
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sector_size_ = 512;
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}
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if (ident[83] & (1 << 10)) {
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lba_count_ = *reinterpret_cast<uint64_t*>(ident + 100);
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} else {
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lba_count_ = *reinterpret_cast<uint32_t*>(ident + 60);
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}
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dbgln("Sector size: {x}", sector_size_);
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dbgln("LBA Count: {x}", lba_count_);
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is_init_ = true;
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}
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return glcr::OK;
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}
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glcr::ErrorOr<mmth::Semaphore*> AhciPort::IssueRead(uint64_t lba,
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uint16_t sector_cnt,
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uint64_t paddr) {
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CommandInfo read{
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.command = kDmaReadExt,
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.lba = lba,
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.sectors = sector_cnt,
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.paddr = paddr,
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};
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return IssueCommand(read);
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}
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glcr::ErrorOr<mmth::Semaphore*> AhciPort::IssueCommand(
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const CommandInfo& command) {
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uint64_t slot;
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for (slot = 0; slot < 32; slot++) {
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if (!(commands_issued_ & (1 << slot))) {
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break;
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}
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}
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if (slot == 32) {
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dbgln("All slots full");
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return glcr::INTERNAL;
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}
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auto* fis = reinterpret_cast<HostToDeviceRegisterFis*>(
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command_tables_[slot].command_fis);
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*fis = HostToDeviceRegisterFis{
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.fis_type = FIS_TYPE_REG_H2D,
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.pmp_and_c = 0x80,
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.command = command.command,
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.featurel = 0,
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.lba0 = static_cast<uint8_t>(command.lba & 0xFF),
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.lba1 = static_cast<uint8_t>((command.lba >> 8) & 0xFF),
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.lba2 = static_cast<uint8_t>((command.lba >> 16) & 0xFF),
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.device = (1 << 6), // ATA LBA Mode
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.lba3 = static_cast<uint8_t>((command.lba >> 24) & 0xFF),
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.lba4 = static_cast<uint8_t>((command.lba >> 32) & 0xFF),
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.lba5 = static_cast<uint8_t>((command.lba >> 40) & 0xFF),
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.featureh = 0,
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.count = command.sectors,
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.icc = 0,
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.control = 0,
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.reserved = 0,
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};
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command_tables_[slot].prdt[0].region_address = command.paddr;
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command_tables_[slot].prdt[0].byte_count = 512 * command.sectors;
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command_list_->command_headers[slot].prd_table_length = 1;
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command_list_->command_headers[slot].command =
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(sizeof(HostToDeviceRegisterFis) / 2) & 0x1F;
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// Set prefetch bit.
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command_list_->command_headers[slot].command |= (1 << 7);
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// TODO: Synchronization-wise we need to ensure this is set in the same
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// critical section as where we select a slot.
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commands_issued_ |= (1 << slot);
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port_struct_->command_issue |= (1 << slot);
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return &command_signals_[slot];
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}
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void AhciPort::DumpInfo() {
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dbgln("Comlist: {x}", port_struct_->command_list_base);
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dbgln("FIS: {x}", port_struct_->fis_base);
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dbgln("Command: {x}", port_struct_->command);
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dbgln("Signature: {x}", port_struct_->signature);
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dbgln("SATA status: {x}", port_struct_->sata_status);
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dbgln("SATA error: {x}", port_struct_->sata_error);
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dbgln("Int status: {x}", port_struct_->interrupt_status);
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dbgln("Int enable: {x}", port_struct_->interrupt_enable);
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}
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bool CheckFisType(FIS_TYPE expected, uint8_t actual) {
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if (expected == actual) {
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return true;
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}
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dbgln("BAD FIS TYPE (exp,act): {x}, {x}", static_cast<uint64_t>(expected),
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static_cast<uint64_t>(actual));
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return false;
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}
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void AhciPort::HandleIrq() {
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uint32_t int_status = port_struct_->interrupt_status;
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port_struct_->interrupt_status = int_status;
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bool has_error = false;
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if (int_status & kInterrupt_D2H_FIS) {
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volatile DeviceToHostRegisterFis& fis =
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received_fis_->device_to_host_register_fis;
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if (!CheckFisType(FIS_TYPE_REG_D2H, fis.fis_type)) {
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return;
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}
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if (fis.error) {
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dbgln("D2H err: {x}", fis.error);
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dbgln("status: {x}", fis.status);
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dbgln("Error: {x}", port_struct_->sata_error);
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has_error = true;
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}
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}
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if (int_status & kInterrupt_PIO_FIS) {
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volatile PioSetupFis& fis = received_fis_->pio_set_fis;
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if (!CheckFisType(FIS_TYPE_PIO_SETUP, fis.fis_type)) {
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return;
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}
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if (fis.error) {
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dbgln("PIO err: {x}", fis.error);
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dbgln("status: {x}", fis.status);
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has_error = true;
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}
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}
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if (int_status & kInterrupt_DMA_FIS) {
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volatile DmaFis& fis = received_fis_->dma_fis;
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if (!CheckFisType(FIS_TYPE_DMA_SETUP, fis.fis_type)) {
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return;
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}
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// TODO: Actually do something with this FIS.
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}
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if (int_status & kInterrupt_DeviceBits_FIS) {
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volatile SetDeviceBitsFis& fis = received_fis_->set_device_bits_fis;
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if (!CheckFisType(FIS_TYPE_DEV_BITS, fis.fis_type)) {
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return;
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}
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if (fis.error) {
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dbgln("SetDeviceBits err: {x}", fis.error);
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dbgln("status: {x}", fis.status);
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has_error = true;
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}
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}
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if (int_status & kInterrupt_Unknown_FIS) {
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dbgln("Unknown FIS recieved, type: {x}", received_fis_->unknown_fis[0]);
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}
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uint32_t commands_finished = commands_issued_ & ~port_struct_->command_issue;
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for (uint64_t i = 0; i < 32; i++) {
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if (commands_finished & (1 << i)) {
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// TODO: Pass error codes to the callback.
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command_signals_[i].Signal();
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commands_issued_ &= ~(1 << i);
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}
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}
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}
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