48 lines
1.8 KiB
C++
48 lines
1.8 KiB
C++
#include "xhci/device_slot.h"
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#include "xhci/trb.h"
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void DeviceSlot::EnableAndInitializeDataStructures(uint8_t slot_index,
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uint64_t* output_context) {
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enabled_ = true;
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slot_index_ = slot_index;
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context_memory_ =
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mmth::OwnedMemoryRegion::ContiguousPhysical(0x1000, &context_phys_);
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device_context_ =
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reinterpret_cast<XhciDeviceContext*>(context_memory_.vaddr());
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*output_context = context_phys_;
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input_context_ = reinterpret_cast<XhciInputContext*>(context_memory_.vaddr() +
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kInputSlotContextOffset);
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control_endpoint_transfer_trb_ = glcr::MakeUnique<TrbRingWriter>();
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}
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XhciTrb DeviceSlot::CreateAddressDeviceCommand(uint8_t root_port,
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uint32_t route_string,
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uint16_t max_packet_size) {
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// Initialize Slot Context and Endpoint 0 Context.
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input_context_->input.add_contexts = 0x3;
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// Set context_entries to 1. XHCI 4.3.3
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input_context_->slot_context.route_speed_entries = (0x1 << 27) | route_string;
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input_context_->slot_context.latency_port_number = root_port << 16;
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// Initialize Control Endpoint.
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input_context_->endpoint_contexts[0].state = 0;
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constexpr uint16_t kCerr = 0x3 << 1;
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constexpr uint16_t kTypeControl = 0x4 << 3;
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input_context_->endpoint_contexts[0].error_and_type =
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kCerr | kTypeControl | (max_packet_size << 16);
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input_context_->endpoint_contexts[0].tr_dequeue_ptr =
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control_endpoint_transfer_trb_->PhysicalAddress() | 0x1;
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return ::CreateAddressDeviceCommand(context_phys_ + kInputSlotContextOffset,
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slot_index_);
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}
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uint8_t DeviceSlot::State() {
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return device_context_->slot_context.address_and_state >> 27;
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}
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