acadia/zion/syscall/pci.cpp

45 lines
1.4 KiB
C++

#include "syscall/pci.h"
#include "object/pci_port.h"
#include "scheduler/scheduler.h"
z_err_t PciRead(ZPciReadReq* req) {
auto& curr_proc = gScheduler->CurrentProcess();
auto pci_cap = curr_proc.GetCapability(req->pci_cap);
RET_ERR(ValidateCapability<PciPort>(pci_cap, kZionPerm_Read));
*req->output = pci_cap->obj<PciPort>()->ReadAtOffset(req->bus, req->slot,
req->func, req->offset);
return glcr::OK;
}
z_err_t PciCreateBound(ZPciCreateBoundReq* req) {
auto& curr_proc = gScheduler->CurrentProcess();
auto pci_cap = curr_proc.GetCapability(req->pci_cap);
RET_ERR(ValidateCapability<PciPort>(pci_cap, kZionPerm_Duplicate));
*req->new_cap = curr_proc.AddNewCapability(
PciPortBound::Create(req->bus, req->slot, req->func));
return glcr::OK;
}
z_err_t PciReadBound(ZPciReadBoundReq* req) {
auto& curr_proc = gScheduler->CurrentProcess();
auto pci_cap = curr_proc.GetCapability(req->pci_cap);
RET_ERR(ValidateCapability<PciPortBound>(pci_cap, kZionPerm_Read));
*req->data = pci_cap->obj<PciPortBound>()->Read(req->offset);
return glcr::OK;
}
z_err_t PciWriteBound(ZPciWriteBoundReq* req) {
auto& curr_proc = gScheduler->CurrentProcess();
auto pci_cap = curr_proc.GetCapability(req->pci_cap);
RET_ERR(ValidateCapability<PciPortBound>(pci_cap, kZionPerm_Write));
pci_cap->obj<PciPortBound>()->Write(req->offset, req->data);
return glcr::OK;
}