Compare commits

...

2 Commits

2 changed files with 19 additions and 12 deletions

View File

@ -55,10 +55,20 @@ glcr::ErrorCode AhciPort::Identify() {
ASSIGN_OR_RETURN(auto* sem, IssueCommand(identify));
sem->Wait();
uint16_t* ident = reinterpret_cast<uint16_t*>(region.vaddr());
uint32_t* sector_size = reinterpret_cast<uint32_t*>(ident + 117);
dbgln("Sector size: {}", *sector_size);
uint64_t* lbas = reinterpret_cast<uint64_t*>(ident + 100);
dbgln("LBA Count: {}", *lbas);
if (ident[106] & (1 << 12)) {
sector_size_ = *reinterpret_cast<uint32_t*>(ident + 117);
} else {
sector_size_ = 512;
}
if (ident[83] & (1 << 10)) {
lba_count_ = *reinterpret_cast<uint64_t*>(ident + 100);
} else {
lba_count_ = *reinterpret_cast<uint32_t*>(ident + 60);
}
dbgln("Sector size: {x}", sector_size_);
dbgln("LBA Count: {x}", lba_count_);
is_init_ = true;
}
return glcr::OK;
}
@ -156,8 +166,6 @@ void AhciPort::HandleIrq() {
bool has_error = false;
if (int_status & kInterrupt_D2H_FIS) {
dbgln("D2H Received");
// Device to host.
volatile DeviceToHostRegisterFis& fis =
received_fis_->device_to_host_register_fis;
if (!CheckFisType(FIS_TYPE_REG_D2H, fis.fis_type)) {
@ -172,13 +180,10 @@ void AhciPort::HandleIrq() {
}
}
if (int_status & kInterrupt_PIO_FIS) {
dbgln("PIO Received");
// PIO.
volatile PioSetupFis& fis = received_fis_->pio_set_fis;
if (!CheckFisType(FIS_TYPE_PIO_SETUP, fis.fis_type)) {
return;
}
dbgln("Count: {x} {x} {x}", fis.counth, fis.countl, fis.e_status);
if (fis.error) {
dbgln("PIO err: {x}", fis.error);
dbgln("status: {x}", fis.status);
@ -186,7 +191,6 @@ void AhciPort::HandleIrq() {
}
}
if (int_status & kInterrupt_DMA_FIS) {
dbgln("DMA Received");
volatile DmaFis& fis = received_fis_->dma_fis;
if (!CheckFisType(FIS_TYPE_DMA_SETUP, fis.fis_type)) {
return;
@ -194,7 +198,6 @@ void AhciPort::HandleIrq() {
// TODO: Actually do something with this FIS.
}
if (int_status & kInterrupt_DeviceBits_FIS) {
dbgln("Device Bits Received");
volatile SetDeviceBitsFis& fis = received_fis_->set_device_bits_fis;
if (!CheckFisType(FIS_TYPE_DEV_BITS, fis.fis_type)) {
return;

View File

@ -20,7 +20,7 @@ class AhciPort {
void DumpInfo();
bool IsSata() { return port_struct_->signature == 0x101; }
bool IsInit() { return port_struct_ != nullptr && command_structures_; }
bool IsInit() { return is_init_; }
glcr::ErrorCode Identify();
@ -43,5 +43,9 @@ class AhciPort {
glcr::Array<mmth::Semaphore> command_signals_;
uint32_t commands_issued_ = 0;
bool is_init_ = false;
uint64_t lba_count_ = 0;
uint32_t sector_size_ = 0;
glcr::ErrorOr<mmth::Semaphore*> IssueCommand(const CommandInfo& command);
};