2023-05-29 00:32:54 -07:00
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#pragma once
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#include <stdint.h>
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2023-10-24 23:32:05 -07:00
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#include "zcall_macros.h"
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2023-06-17 01:45:53 -07:00
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#include "ztypes.h"
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2023-05-29 00:32:54 -07:00
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2023-06-20 14:01:43 -07:00
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z_err_t SysCall1(uint64_t code, const void* req);
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2023-05-30 20:55:03 -07:00
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2023-06-20 14:01:43 -07:00
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SYS1(ProcessExit, uint64_t, code);
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SYS5(ProcessSpawn, z_cap_t, proc_cap, z_cap_t, bootstrap_cap, z_cap_t*,
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new_proc_cap, z_cap_t*, new_vmas_cap, z_cap_t*, new_bootstrap_cap);
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2023-06-06 16:24:03 -07:00
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2023-06-20 13:50:18 -07:00
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SYS2(ThreadCreate, z_cap_t, proc_cap, z_cap_t*, thread_cap);
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2023-06-20 14:10:28 -07:00
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SYS4(ThreadStart, z_cap_t, thread_cap, uint64_t, entry, uint64_t, arg1,
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uint64_t, arg2);
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SYS0(ThreadExit);
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2023-06-22 02:17:50 -07:00
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SYS1(ThreadWait, z_cap_t, thread_cap);
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2023-06-06 16:24:03 -07:00
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2023-06-20 14:26:06 -07:00
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SYS4(AddressSpaceMap, z_cap_t, vmas_cap, uint64_t, vmas_offset, z_cap_t,
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vmmo_cap, uint64_t*, vaddr);
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2023-11-19 18:55:44 -08:00
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SYS3(AddressSpaceUnmap, z_cap_t, vmas_cap, uint64_t, lower_addr, uint64_t,
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upper_addr);
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2023-06-12 19:20:51 -07:00
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2023-06-20 14:26:06 -07:00
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SYS2(MemoryObjectCreate, uint64_t, size, z_cap_t*, vmmo_cap);
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SYS3(MemoryObjectCreatePhysical, uint64_t, paddr, uint64_t, size, z_cap_t*,
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vmmo_cap);
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SYS3(MemoryObjectCreateContiguous, uint64_t, size, z_cap_t*, vmmo_cap,
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uint64_t*, paddr);
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2023-06-07 08:50:08 -07:00
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2023-08-01 17:46:26 -07:00
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SYS4(MemoryObjectDuplicate, z_cap_t, vmmo_cap, uint64_t, base_offset, uint64_t,
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length, z_cap_t*, new_vmmo_cap);
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2023-06-20 14:41:44 -07:00
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SYS2(ChannelCreate, z_cap_t*, channel1, z_cap_t*, channel2);
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SYS5(ChannelSend, z_cap_t, chan_cap, uint64_t, num_bytes, const void*, data,
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uint64_t, num_caps, z_cap_t*, caps);
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SYS5(ChannelRecv, z_cap_t, chan_cap, uint64_t*, num_bytes, void*, data,
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uint64_t*, num_caps, z_cap_t*, caps);
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2023-06-07 08:50:08 -07:00
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2023-06-20 14:55:54 -07:00
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SYS1(PortCreate, z_cap_t*, port_cap);
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SYS5(PortSend, z_cap_t, port_cap, uint64_t, num_bytes, const void*, data,
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uint64_t, num_caps, z_cap_t*, caps);
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SYS5(PortRecv, z_cap_t, port_cap, uint64_t*, num_bytes, void*, data, uint64_t*,
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num_caps, z_cap_t*, caps);
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SYS5(PortPoll, z_cap_t, port_cap, uint64_t*, num_bytes, void*, data, uint64_t*,
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num_caps, z_cap_t*, caps);
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SYS2(IrqRegister, uint64_t, irq_num, z_cap_t*, port_cap);
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2023-06-12 19:20:51 -07:00
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2023-06-21 21:26:24 -07:00
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SYS1(EndpointCreate, z_cap_t*, endpoint_cap);
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2023-10-24 23:32:05 -07:00
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SYS6(EndpointSend, z_cap_t, endpoint_cap, uint64_t, num_bytes, const void*,
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data, uint64_t, num_caps, const z_cap_t*, caps, z_cap_t*, reply_port_cap);
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SYS6(EndpointRecv, z_cap_t, endpoint_cap, uint64_t*, num_bytes, void*, data,
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uint64_t*, num_caps, z_cap_t*, caps, z_cap_t*, reply_port_cap);
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2023-06-21 21:26:24 -07:00
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SYS5(ReplyPortSend, z_cap_t, reply_port_cap, uint64_t, num_bytes, const void*,
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data, uint64_t, num_caps, z_cap_t*, caps);
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2023-06-21 23:14:42 -07:00
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SYS5(ReplyPortRecv, z_cap_t, reply_port_cap, uint64_t*, num_bytes, void*, data,
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uint64_t*, num_caps, z_cap_t*, caps);
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2023-06-21 21:26:24 -07:00
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2023-11-02 22:12:55 -07:00
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SYS3(CapDuplicate, z_cap_t, cap_in, z_perm_t, perm_mask, z_cap_t*, cap_out);
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2023-11-19 17:53:56 -08:00
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SYS1(CapRelease, z_cap_t, cap);
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2023-06-17 00:59:44 -07:00
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2023-10-25 14:47:45 -07:00
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SYS1(MutexCreate, z_cap_t*, mutex_cap);
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SYS1(MutexLock, z_cap_t, mutex_cap);
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SYS1(MutexRelease, z_cap_t, mutex_cap);
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2023-06-20 15:03:33 -07:00
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SYS1(Debug, const char*, message);
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